On 2/10/26 12:02, Michal Simek wrote:
From: Maheedhar Bollapalli <[email protected]>
Versal2 was using wrong GIC base mappings, causing GICR_TYPER reads to
not match EL1 MPIDR. This led U-Boot to walk beyond the per-CPU GICR
frames, access out-of-range addresses, and hit a synchronous exception
during early gic init percpu while booting up on alternate core
i.e., non cpu0.
Update Versal Gen 2 headers to the correct Versal Gen 2 bases.
Signed-off-by: Maheedhar Bollapalli <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
---
include/configs/amd_versal2.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/amd_versal2.h b/include/configs/amd_versal2.h
index 05ddd4eabe16..404af2cd4c65 100644
--- a/include/configs/amd_versal2.h
+++ b/include/configs/amd_versal2.h
@@ -16,8 +16,8 @@
/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
/* Generic Interrupt Controller Definitions */
-#define GICD_BASE 0xF9000000
-#define GICR_BASE 0xF9060000
+#define GICD_BASE 0xe2000000
+#define GICR_BASE 0xe2060000
/* Serial setup */
#define CFG_SYS_BAUDRATE_TABLE \
Nothing controversial about this that's why applied.
M
