On 2/18/26 11:03, Begari, Padmarao wrote:
[Public]
From: Venkatesh Yadav Abbarapu <[email protected]>
Sent: Wednesday, April 30, 2025 10:39 AM
To: [email protected]; [email protected]; [email protected];
[email protected]
Cc: Simek, Michal <[email protected]>; [email protected];
[email protected]; [email protected]; [email protected]; [email protected];
[email protected]; [email protected]; [email protected];
[email protected]; [email protected]; [email protected];
[email protected]; git (AMD-Xilinx) <[email protected]>
Subject: [PATCH] spi: cadence_qspi: Disable the DAC mode in indirect read
Hang has been observed on QEMU, as it starts with indac read and fills sram, but
after dma is triggered, it tries dac read instead (based on priority) which
gets blocked.
Disable the DAC mode in indirect DMA read and enable back for writes as DAC
mode is used.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Tested-by: Padmarao Begari <[email protected]>
Applied.
M
