unlocking control mmr before spl_early_init leads to
unpredicable behaviour.
So unlock it after spl_early_init.
Fixes: 5e291ee34fd4 ("arch: mach-k3: Introduce basic files to support J722S SoC
family")
Reported-by: Diwakar Dhyani <[email protected]>
Signed-off-by: Udit Kumar <[email protected]>
---
On HS-SE of J722S in particular, enable_mcu_esm_reset function is not able to
reset bit-17 of ctrl mmr CTRLMMR_MCU_RST_CTRL.
Which leads to wdt is not functional. With this change
bit-17 was getting reset properly on HS-SE and HS-FS devices.
HS-FS
https://gist.github.com/uditkumarti/4ba05c9335212630ce9240ac67e11c2d#file-hs-fs
HS-SE
https://gist.github.com/uditkumarti/4ba05c9335212630ce9240ac67e11c2d#file-hs-se
arch/arm/mach-k3/j722s/j722s_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-k3/j722s/j722s_init.c
b/arch/arm/mach-k3/j722s/j722s_init.c
index 1180c75f551..a0dab5d7032 100644
--- a/arch/arm/mach-k3/j722s/j722s_init.c
+++ b/arch/arm/mach-k3/j722s/j722s_init.c
@@ -84,13 +84,13 @@ static void k3_spl_init(void)
*/
store_boot_info_from_rom();
- ctrl_mmr_unlock();
-
/* Init DM early */
ret = spl_early_init();
if (ret)
panic("spl_early_init() failed: %d\n", ret);
+ ctrl_mmr_unlock();
+
/*
* Process pinctrl for the serial0 a.k.a. WKUP_UART0 module and continue
* regardless of the result of pinctrl. Do this without probing the
--
2.34.1
