From: Dinesh Maniyam <[email protected]> Those functions are required in NAND FIT implementation, so include them in NAND build.
Signed-off-by: Tien Fong Chee <[email protected]> Signed-off-by: Dinesh Maniyam <[email protected]> --- arch/arm/mach-socfpga/spl_a10.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index f2f82716ae2..310dce517a6 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -287,7 +287,8 @@ void spl_board_prepare_for_boot(void) SYSMGR_A10_ROMCODE_INITSWSTATE); } -#if CONFIG_IS_ENABLED(SPL_LOAD_FIT) && CONFIG_IS_ENABLED(SPL_SPI_LOAD) +#if CONFIG_IS_ENABLED(SPL_LOAD_FIT) && (CONFIG_IS_ENABLED(SPL_SPI_LOAD) || \ + CONFIG_IS_ENABLED(SPL_NAND_SUPPORT)) struct legacy_img_hdr *spl_get_load_buffer(int offset, size_t size) { if (gd->ram_size) -- 2.43.7
