Hi Anshul On 3/10/2026 2:46 PM, Anshul Dalal wrote: > The dram_init_banksize API configures the dram banks inside gd->bd, so > ensure bd is initialized by calling spl_set_bd as part of > spl_enable_cache. > > Signed-off-by: Anshul Dalal <[email protected]> > --- > arch/arm/mach-k3/common.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c > index 2f3df5519c5..39467c21679 100644 > --- a/arch/arm/mach-k3/common.c > +++ b/arch/arm/mach-k3/common.c > @@ -418,6 +418,9 @@ void spl_enable_cache(void) > gd->ram_top = CFG_SYS_SDRAM_BASE; > int ret = 0; > > + /* dram_init_banksize populates bd, so init it first */ > + spl_set_bd(); > +
I think we really need to evaluate where all we are calling dram_init_banksize, else we keep finding related debugs confusing [0] We have to stick as closely as possible to the common SPL flow: board_init_r --> spl_set_bd .. dram_init_banksize Problem is we need dram_init_banksize calls even before relocation because of spl_enable_cache. For my knowledge, do we have a specific reason why we are calling spl_enable_cache before relocation? I am guessing some MMU setup happening before we relocate partly to DDR as being the reason? I think it's better you move calling spl_set_bd() up a level into board_init_f for now (similar to what arch/arm/cpu/armv8/fsl-layerscape/spl.c does). We should be calling this before we call dram_init (or in our case k3_mem_init) so that we are sure it is setup prior to any dram_init_banksize calls. > dram_init(); > dram_init_banksize(); > > > --- > base-commit: 1e240f7206fccde4ec73ea432ab8360d321c5fe5 > change-id: 20260310-init_bd_before_dram_init-7a9c3ad0b311 > > Best regards, [0] https://lore.kernel.org/u-boot/[email protected]/ -- Thanking You Neha Malcom Francis
