From: Bryan Brattlof <[email protected]> The pocketbeagle2 uses the main_uart6 as the debug console. To get debug console prints at the R5 SPL stage, add the &main_uart6 to the R5 clk and dev data so we can configure the uart as early as possible during the bootup of the pocketbeagle2
Signed-off-by: Bryan Brattlof <[email protected]> --- arch/arm/mach-k3/r5/am62x/clk-data.c | 19 +++++++++++++++---- arch/arm/mach-k3/r5/am62x/dev-data.c | 5 +++-- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-k3/r5/am62x/clk-data.c b/arch/arm/mach-k3/r5/am62x/clk-data.c index d7bfed0e031..05cced0b313 100644 --- a/arch/arm/mach-k3/r5/am62x/clk-data.c +++ b/arch/arm/mach-k3/r5/am62x/clk-data.c @@ -3,9 +3,9 @@ * AM62X specific clock platform data * * This file is auto generated. Please do not hand edit and report any issues - * to Dave Gerlach <[email protected]>. + * to Bryan Brattlof <[email protected]>. * - * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2025 Texas Instruments Incorporated - https://www.ti.com/ */ #include <linux/clk-provider.h> @@ -125,6 +125,11 @@ static const char * const main_usart0_fclk_sel_out0_parents[] = { "hsdiv4_16fft_main_1_hsdivout1_clk", }; +static const char * const main_usart6_fclk_sel_out0_parents[] = { + "usart_programmable_clock_divider_out6", + "hsdiv4_16fft_main_1_hsdivout1_clk", +}; + static const struct clk_data clk_list[] = { CLK_FIXED_RATE("osc_26_mhz", 26000000, 0), CLK_FIXED_RATE("osc_25_mhz", 25000000, 0), @@ -210,9 +215,11 @@ static const struct clk_data clk_list[] = { CLK_MUX("main_gtcclk_sel_out0", main_gtcclk_sel_out0_parents, 8, 0x43008030, 0, 3, 0), CLK_MUX("main_ospi_ref_clk_sel_out0", main_ospi_ref_clk_sel_out0_parents, 2, 0x108500, 0, 1, 0), CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x108240, 0, 2, 0, 0, 48000000), + CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out6", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x108258, 0, 2, 0, 0, 48000000), CLK_MUX("wkup_clkout_sel_out0", wkup_clkout_sel_out0_parents, 8, 0x43008020, 0, 3, 0), CLK_MUX("wkup_clksel_out0", wkup_clksel_out0_parents, 2, 0x43008010, 0, 1, 0), CLK_MUX("main_usart0_fclk_sel_out0", main_usart0_fclk_sel_out0_parents, 2, 0x108280, 0, 1, 0), + CLK_MUX("main_usart6_fclk_sel_out0", main_usart6_fclk_sel_out0_parents, 2, 0x108298, 0, 1, 0), CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout1_clk", "pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040084, 0, 7, 0, 0), CLK_FIXED_RATE("mshsi2c_wkup_0_porscl", 0, 0), CLK_DIV("sam62_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "sam62_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0), @@ -336,6 +343,10 @@ static const struct dev_clk soc_dev_clk_data[] = { DEV_CLK(157, 164, "clk_32k_rc_sel_out0"), DEV_CLK(157, 165, "gluelogic_rcosc_clkout"), DEV_CLK(157, 166, "gluelogic_hfosc0_clkout"), + DEV_CLK(158, 0, "main_usart6_fclk_sel_out0"), + DEV_CLK(158, 1, "usart_programmable_clock_divider_out6"), + DEV_CLK(158, 2, "hsdiv4_16fft_main_1_hsdivout1_clk"), + DEV_CLK(158, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(161, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(161, 1, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(161, 2, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), @@ -361,7 +372,7 @@ static const struct dev_clk soc_dev_clk_data[] = { const struct ti_k3_clk_platdata am62x_clk_platdata = { .clk_list = clk_list, - .clk_list_cnt = 90, + .clk_list_cnt = 92, .soc_dev_clk_data = soc_dev_clk_data, - .soc_dev_clk_data_cnt = 137, + .soc_dev_clk_data_cnt = 140, }; diff --git a/arch/arm/mach-k3/r5/am62x/dev-data.c b/arch/arm/mach-k3/r5/am62x/dev-data.c index 59c95df2a88..ea1e76a8a75 100644 --- a/arch/arm/mach-k3/r5/am62x/dev-data.c +++ b/arch/arm/mach-k3/r5/am62x/dev-data.c @@ -3,9 +3,9 @@ * AM62X specific device platform data * * This file is auto generated. Please do not hand edit and report any issues - * to Dave Gerlach <[email protected]>. + * to Bryan Brattlof <[email protected]>. * - * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2025 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-dev.h" @@ -61,6 +61,7 @@ static struct ti_dev soc_dev_list[] = { PSC_DEV(36, &soc_lpsc_list[11]), PSC_DEV(102, &soc_lpsc_list[11]), PSC_DEV(146, &soc_lpsc_list[11]), + PSC_DEV(158, &soc_lpsc_list[11]), PSC_DEV(13, &soc_lpsc_list[12]), PSC_DEV(166, &soc_lpsc_list[13]), PSC_DEV(135, &soc_lpsc_list[14]), -- 2.53.0
