From: Peng Fan <[email protected]> Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC handling.
Changes include: - Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig. - Drop legacy SPL I2C and PMIC options. - Remove manual I2C1 pad setup and legacy power_pca9450_init() usage. - Use DM-based pmic_get() with the DT node "pmic@25". - Update PMIC register programming to use struct udevice API. Signed-off-by: Peng Fan <[email protected]> --- arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi | 20 +++++++-- board/toradex/verdin-imx8mp/spl.c | 55 +++++++------------------ configs/verdin-imx8mp_defconfig | 13 ++---- 3 files changed, 37 insertions(+), 51 deletions(-) diff --git a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi index 7b45a87450b..3b0af5bc0a0 100644 --- a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi @@ -70,7 +70,7 @@ }; &i2c1 { - bootph-pre-ram; + bootph-all; eeprom_module: eeprom@50 { compatible = "i2c-eeprom"; @@ -104,7 +104,7 @@ }; &pca9450 { - bootph-pre-ram; + bootph-all; }; &pinctrl_ctrl_sleep_moci { @@ -112,7 +112,11 @@ }; &pinctrl_i2c1 { - bootph-pre-ram; + bootph-all; +}; + +&pinctrl_pmic { + bootph-all; }; &pinctrl_usdhc2_pwr_en { @@ -159,6 +163,12 @@ sd-uhs-ddr50; sd-uhs-sdr104; bootph-pre-ram; + /* + * LDO5 output depends on SD2_VSEL, but no way to read back SD2_VSEL + * when using SDHC controller VSELECT to control SD2_VSEL. So drop + * vqmmc-supply to avoid fsl_esdhc_imx read back wrong voltage. + */ + /delete-property/ vqmmc-supply; }; &usdhc3 { @@ -173,3 +183,7 @@ &wdog1 { bootph-pre-ram; }; + +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { + bootph-all; +}; diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c index b39058b1b5d..44678a976ca 100644 --- a/board/toradex/verdin-imx8mp/spl.c +++ b/board/toradex/verdin-imx8mp/spl.c @@ -8,12 +8,8 @@ #include <log.h> #include <spl.h> #include <asm/arch/clock.h> -#include <asm/arch/imx8mp_pins.h> #include <asm/arch/sys_proto.h> #include <asm/mach-imx/boot_mode.h> -#include <asm/mach-imx/gpio.h> -#include <asm/mach-imx/iomux-v3.h> -#include <asm/mach-imx/mxc_i2c.h> #include <asm/arch/ddr.h> #include <dm/device.h> #include <dm/uclass.h> @@ -68,36 +64,21 @@ void spl_board_init(void) puts("Normal Boot\n"); } -#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE) -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC, - .gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC, - .gp = IMX_GPIO_NR(5, 14), - }, - .sda = { - .i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC, - .gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC, - .gp = IMX_GPIO_NR(5, 15), - }, -}; - -#if CONFIG_IS_ENABLED(POWER_LEGACY) -#define I2C_PMIC 0 int power_init_board(void) { - struct pmic *p; + struct udevice *dev; int ret; - ret = power_pca9450_init(I2C_PMIC, 0x25); - if (ret) - printf("power init failed\n"); - p = pmic_get("PCA9450"); - pmic_probe(p); + ret = pmic_get("pmic@25", &dev); + if (ret == -ENODEV) { + puts("No pmic@25\n"); + return 0; + } + if (ret < 0) + return ret; /* BUCKxOUT_DVS0/1 control BUCK123 output */ - pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29); + pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29); /* * increase VDD_SOC to typical value 0.95V before first @@ -107,23 +88,22 @@ int power_init_board(void) */ if (IS_ENABLED(CONFIG_IMX8M_VDD_SOC_850MV)) /* set DVS0 to 0.85v for special case */ - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14); + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14); else - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1c); - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14); - pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59); + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1c); + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14); + pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); /* Kernel uses OD/OD freq for SoC */ /* To avoid timing risk from SoC to ARM, increase VDD_ARM to OD voltage 0.95v */ - pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1c); + pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1c); /* set LDO4 and CONFIG2 to enable the I2C level translator */ - pmic_reg_write(p, PCA9450_LDO4CTRL, 0x59); - pmic_reg_write(p, PCA9450_CONFIG2, 0x1); + pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x59); + pmic_reg_write(dev, PCA9450_CONFIG2, 0x1); return 0; } -#endif #if IS_ENABLED(CONFIG_SPL_LOAD_FIT) int board_fit_config_name_match(const char *name) @@ -156,9 +136,6 @@ void board_init_f(ulong dummy) enable_tzc380(); - /* Adjust PMIC voltage to 1.0V for 800 MHz */ - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - /* PMIC initialization */ power_init_board(); diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 99749c50194..455a601b07d 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -7,10 +7,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 -CONFIG_SYS_I2C_MXC_I2C1=y -CONFIG_SYS_I2C_MXC_I2C2=y -CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-verdin-wifi-dev" CONFIG_TARGET_VERDIN_IMX8MP=y @@ -119,8 +115,6 @@ CONFIG_SPL_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y -# CONFIG_SPL_DM_I2C is not set -CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_I2C_EEPROM=y @@ -152,14 +146,15 @@ CONFIG_PHY_IMX8M_PCIE=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y -CONFIG_SPL_POWER_LEGACY=y CONFIG_POWER_DOMAIN=y CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y -CONFIG_POWER_PCA9450=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PCA9450=y +CONFIG_SPL_DM_PMIC_PCA9450=y +CONFIG_DM_REGULATOR_PCA9450=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_SPL_POWER_I2C=y CONFIG_DM_RNG=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y -- 2.51.0
