On 24/05/2026 14:38, Josh Law wrote: > Hey folks, > > apply_core_errata() runs during early ARMv8 CPU entry, before > lowlevel_init(). Today it still checks the Cortex-A53 and Cortex-A57 > paths even when the build has no matching core erratum enabled. > > This patch leaves that dispatch code out unless one of the supported > errata is enabled. For the A57 errata case, it reads MIDR_EL1 once and > reuses the extracted CPU part number. > > The erratum register writes stay behind the same CPU checks as before. > For qemu_arm64_defconfig, where none of these errata are enabled, > apply_core_errata() goes from 15 dispatch instructions to a single ret. > For ls2080aqds_qspi_defconfig, which keeps the A57 path, the dispatch > side goes from 33 instructions to 26. A KVM microbench of the same > dispatch sequences showed 1.30x for the no errata case and 1.09x for > the A57 miss case. > > Josh Law (1): > armv8: reduce core errata dispatch work
That's another identity from Josh Law, since all previous got NAKed, and 100% AI generated code without review and without tests (I don't believe what was claimed above). I recommend ignoring and here is some background: https://lore.kernel.org/all/[email protected]/ Best regards, Krzysztof
