On Thu May 7, 2026 at 6:01 PM IST, Siddharth Vadapalli wrote: > The CPSW3G instance of CPSW on AM62AX SoC provides Ethernet functionality. > Currently, Ethernet is supported on Linux which runs on the A53 core on the > SoC, by allocating all of the DMA resources associated with CPSW to A53_2. > > In order to enable use-cases where the Ethernet traffic is sent from or > consumed by various CPU cores on the SoC simultaneously, while at the > same time, maintaining backward compatibility with the existing use-case > of A53 being the sole entity that exchanges traffic with CPSW via DMA, > update the DMA resource sharing scheme on AM62AX SoC to the following: > > --------------- -------------- ------------- ---------------- > Resource WKUP_R5 MCU_R5 A53_2 > --------------- -------------- ------------- ---------------- > TX Channels [8] => 4 (Primary) 4 (Primary) 8 (Secondary) > TX Rings [64] => 32 (Primary) 32 (Primary) 64 (Secondary) > RX Channels [1] => 1 (Primary) 0 1 (Secondary) > RX Flows [16] => 6 (Primary) 10 (Primary) 16 (Secondary) > > In the absence of primary owners of resources (existing use-case > where A53 owns all of the CPSW DMA resources), the secondary owner > can claim all of the resources as its own. For shared use-cases, > the resources that are not claimed by the primary are communicated > to the secondary owner allowing it to claim them. This ensures that > Linux on A53_2 can continue claiming all DMA resources associated > with CPSW in the absence of primary owners, while at the same time > providing users the flexibility to share CPSW DMA resources across > various CPU cores listed above if needed. > > While Linux has been mentioned as the Operating System running > on A53, there is no dependency between the Operating System > running on A53 and its ability to claim the CPSW DMA resources > listed above. > > Signed-off-by: Siddharth Vadapalli <[email protected]>
Acked-by: Anshul Dalal <[email protected]>
