From: Sam Day <[email protected]> The infra currently assumes that each GPIO register block is 0x1000 wide. This is not the case on older TLMM versions.
For example, the GPIOs on MSM8960's TLMM hav an *offset* of 0x1000, and each register block is only 0x10 wide. Signed-off-by: Sam Day <[email protected]> --- arch/arm/mach-snapdragon/include/mach/gpio.h | 12 ++++++++---- drivers/gpio/msm_gpio.c | 2 +- drivers/pinctrl/qcom/pinctrl-qcom.c | 2 +- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-snapdragon/include/mach/gpio.h b/arch/arm/mach-snapdragon/include/mach/gpio.h index 11e8104baf2..49bf480c903 100644 --- a/arch/arm/mach-snapdragon/include/mach/gpio.h +++ b/arch/arm/mach-snapdragon/include/mach/gpio.h @@ -27,16 +27,20 @@ struct msm_special_pin_data { struct msm_pin_data { int pin_count; const unsigned int *pin_offsets; + u32 gpio_base; + /* defaults to 0x1000 */ + u32 gpio_stride; unsigned int special_pins_start; const struct msm_special_pin_data *special_pins_data; }; -static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int selector) +static inline u32 qcom_pin_offset(const struct msm_pin_data *pindata, unsigned int selector) { - u32 out = (selector * 0x1000); + u32 stride = pindata->gpio_stride ? pindata->gpio_stride : 0x1000; + u32 out = pindata->gpio_base + selector * stride; - if (offs) - return out + offs[selector]; + if (pindata->pin_offsets) + return out + pindata->pin_offsets[selector]; return out; } diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c index 7de332c66ae..a24d0f03398 100644 --- a/drivers/gpio/msm_gpio.c +++ b/drivers/gpio/msm_gpio.c @@ -29,7 +29,7 @@ struct msm_gpio_bank { }; #define GPIO_CONFIG_REG(dev, x) \ - (qcom_pin_offset(((struct msm_gpio_bank *)dev_get_priv(dev))->pin_data->pin_offsets, x)) + (qcom_pin_offset(((struct msm_gpio_bank *)dev_get_priv(dev))->pin_data, x)) #define GPIO_IN_OUT_REG(dev, x) \ (GPIO_CONFIG_REG(dev, x) + 0x4) diff --git a/drivers/pinctrl/qcom/pinctrl-qcom.c b/drivers/pinctrl/qcom/pinctrl-qcom.c index c95db56bc47..82817c2316f 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcom.c +++ b/drivers/pinctrl/qcom/pinctrl-qcom.c @@ -30,7 +30,7 @@ struct msm_pinctrl_priv { }; #define GPIO_CONFIG_REG(priv, x) \ - (qcom_pin_offset((priv)->data->pin_data.pin_offsets, x)) + (qcom_pin_offset(&(priv)->data->pin_data, x)) #define GPIO_IN_OUT_REG(priv, x) \ (GPIO_CONFIG_REG(priv, x) + 0x4) -- 2.54.0
