Hey Stephan, On Thursday, 4 June 2026 at 12:25 AM, Stephan Gerhold <[email protected]> wrote:
> On Wed, Jun 03, 2026 at 08:56:21AM +1000, Sam Day via B4 Relay wrote: > > From: Sam Day <[email protected]> > > > > The dragonboard410c (and likely other SB-off devices) can run U-Boot > > early enough in the boot chain such that UART clock isn't started, and > > pins aren't configured. > > > > APQ8016 has two UART peripherals, each with its own clock and TLMM pins. > > > > Two new debug-apq8016-uartN.config fragments are provided. Each > > configures the appropriate UARTDM aperture. The newly introduced > > DEBUG_UART_APQ8016 Kconfig symbol pulls in MSM debug UART, and enables a > > board-level debug_uart_init function to start the right clock and mux > > the right TX pin. > > > > Signed-off-by: Sam Day <[email protected]> > > --- > > arch/arm/mach-snapdragon/Kconfig | 9 +++++++ > > arch/arm/mach-snapdragon/Makefile | 1 + > > arch/arm/mach-snapdragon/debug-uart-apq8016.c | 37 > > +++++++++++++++++++++++++++ > > board/qualcomm/debug-apq8016-uart1.config | 4 +++ > > board/qualcomm/debug-apq8016-uart2.config | 4 +++ > > drivers/serial/Kconfig | 1 + > > drivers/serial/serial_msm.c | 10 -------- > > 7 files changed, 56 insertions(+), 10 deletions(-) > > > > diff --git a/arch/arm/mach-snapdragon/Kconfig > > b/arch/arm/mach-snapdragon/Kconfig > > index d3de8693b5a..43e6fd1bc42 100644 > > --- a/arch/arm/mach-snapdragon/Kconfig > > +++ b/arch/arm/mach-snapdragon/Kconfig > > @@ -1,5 +1,14 @@ > > if ARCH_SNAPDRAGON > > > > +config DEBUG_UART_APQ8016 > > + bool "APQ8016 early debug initialization" > > + select CLK_QCOM_APQ8016 > > + select CONFIG_DEBUG_UART_MSM > > + select DEBUG_UART_BOARD_INIT > > + help > > + Ensures BLSP UART clocks+pins are setup. Useful when U-Boot is > > running from > > + aboot (such as on the dragonboard410c). > > + > > config SYS_SOC > > default "snapdragon" > > > > diff --git a/arch/arm/mach-snapdragon/Makefile > > b/arch/arm/mach-snapdragon/Makefile > > index 343e825c6fd..824bb4d5daf 100644 > > --- a/arch/arm/mach-snapdragon/Makefile > > +++ b/arch/arm/mach-snapdragon/Makefile > > @@ -5,3 +5,4 @@ > > obj-y += board.o > > obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += capsule_update.o > > obj-$(CONFIG_OF_LIVE) += of_fixup.o > > +obj-$(CONFIG_DEBUG_UART_APQ8016) += debug-uart-apq8016.o > > diff --git a/arch/arm/mach-snapdragon/debug-uart-apq8016.c > > b/arch/arm/mach-snapdragon/debug-uart-apq8016.c > > new file mode 100644 > > index 00000000000..2de9d99bed5 > > --- /dev/null > > +++ b/arch/arm/mach-snapdragon/debug-uart-apq8016.c > > @@ -0,0 +1,37 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * SoC-specific debug UART initialization (clocks/pins) lives here > > + */ > > + > > +#include <asm/io.h> > > +#include <dt-bindings/clock/qcom,gcc-msm8916.h> > > + > > +extern int apq8016_clk_init_uart(phys_addr_t gcc_base, unsigned long id); > > + > > +#define APQ8016_GCC_BASE ((phys_addr_t)0x01800000) > > + > > +#define APQ8016_TLMM_BASE ((phys_addr_t)0x01000000) > > +#define APQ8016_TLMM_FUNC_BLSP_UART (2 << 2) > > +#define APQ8016_TLMM_DRV_8MA (3 << 6) > > +#define APQ8016_TLMM_GPIO_ENABLE BIT(9) > > +#define APQ8016_GPIO_CFG(gpio) (APQ8016_TLMM_BASE + > > (phys_addr_t)(gpio) * 0x1000) > > +#define APQ8016_DEBUG_UART_PINCFG (APQ8016_TLMM_FUNC_BLSP_UART | \ > > + APQ8016_TLMM_DRV_8MA | \ > > + APQ8016_TLMM_GPIO_ENABLE) > > APQ8016_TLMM_GPIO_ENABLE is actually GPIO_OE ("output enable"). Noted, thanks. It'll be renamed in v2. > I guess > it makes sense to set this for a TX pin, but I think this is typically > not set for special-function pins like BLSP_UART. LK doesn't set it > AFAICT. Hmm, am I looking at the wrong thing then? https://github.com/msm8916-mainline/lk2nd/blob/main/platform/msm8916/gpio.c AFAICT, gpio_config_uart_dm calls gpio_tlmm_config with the exceptionally confusing GPIO_DISABLE constant (which is defined as "1"). Cheers, -Sam > > Thanks, > Stephan >
