When U-Boot is loaded by XBL in Snagboot mode, XBL leaves the MMU enabled with its own page tables. This causes stale TLB entries and incorrect memory mappings when U-Boot initializes its own MMU.
Disable the MMU and invalidate TLBs before branching to the reset vector. This ensures a clean MMU state for U-Boot initialization in Snagboot mode. Signed-off-by: Balaji Selvanathan <[email protected]> --- Changes iv v4: - Remove handling for EL1 or EL2 entry as for Snagboot we would only enter U-Boot in EL3 from previous bootloader Changes in v3: - Brought the MMU disable logic under CONFIG_QCOM_SNAGBOOT_SUPPORT ifdef condition - Moved the MMU disable codes to a new seperate file Changes in v2: - Newly introduced in v2 --- arch/arm/mach-snapdragon/include/mach/boot0.h | 2 ++ .../mach-snapdragon/include/mach/snagboot_boot0.h | 26 ++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm/mach-snapdragon/include/mach/boot0.h b/arch/arm/mach-snapdragon/include/mach/boot0.h index 032a9fbdb12..99ab9788155 100644 --- a/arch/arm/mach-snapdragon/include/mach/boot0.h +++ b/arch/arm/mach-snapdragon/include/mach/boot0.h @@ -7,6 +7,8 @@ #include "msm8916_boot0.h" #elif defined(CONFIG_QCOM_EL2_GUNYAH_EXIT_SUPPORT) #include "gunyah_exit_boot0.h" +#elif defined(CONFIG_QCOM_BOOT0_SNAGBOOT_MODE) +#include "snagboot_boot0.h" #else b reset #endif diff --git a/arch/arm/mach-snapdragon/include/mach/snagboot_boot0.h b/arch/arm/mach-snapdragon/include/mach/snagboot_boot0.h new file mode 100644 index 00000000000..6f7bf7eea7f --- /dev/null +++ b/arch/arm/mach-snapdragon/include/mach/snagboot_boot0.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Early MMU Disable for Snagboot Mode + * + * Disable MMU at the earliest possible point for EL3 entry. + * Snagboot mode always enters U-Boot at EL3. + * + * After disabling MMU, invalidate TLB to clear any stale entries that might + * cause issues when MMU is re-enabled later. + */ + + mrs x0, CurrentEL + cmp x0, #(3 << 2) /* Verify EL3 entry */ + b.ne reset /* Unexpected: not at EL3 */ + + /* Disable MMU at EL3 */ + mrs x0, sctlr_el3 + bic x0, x0, #1 /* Clear M bit (MMU enable) */ + bic x0, x0, #(1 << 19) /* Clear WXN bit (Write XOR Execute) */ + msr sctlr_el3, x0 + isb + /* Invalidate entire TLB for all ELs */ + tlbi alle3 + dsb sy + isb + b reset \ No newline at end of file -- 2.34.1
