On 6/16/26 05:36, Marek Vasut wrote:
The RZ/N1D and RZ/N1S contain Cortex-A7 core, which is 32bit ARM core.
Document the SoC as 32bit ARM instead of aarch64.
Fixes: a5b9f959439b ("doc: renesas: add Renesas board docs")
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
---
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Ralph Siemsen <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: [email protected]
---
doc/board/renesas/renesas.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/doc/board/renesas/renesas.rst b/doc/board/renesas/renesas.rst
index 6702d5879b5..fcfd51aa19c 100644
--- a/doc/board/renesas/renesas.rst
+++ b/doc/board/renesas/renesas.rst
@@ -255,13 +255,13 @@ Renesas is a SoC solutions provider for automotive and
industrial applications.
* - :doc:`RZ/N1 Family <rzn1>`
- Schneider RZ/N1D board
- R9A06G032 (RZ/N1D)
- - arm64
+ - arm
- rzn1_snarc_defconfig
* -
- Schneider RZ/N1S board
- R9A06G033 (RZ/N1S)
- - arm64
+ - arm
- rzn1_snarc_defconfig
Build
