Hi Heiko, Thanks for the review.
On 29/4/2026 2:10 pm, Heiko Schocher wrote: > [CAUTION: This email is from outside your organization. Unless you trust the > sender, do not click on links or open attachments as it may be a fraudulent > email attempting to steal your information and/or compromise your computer.] > > Hello Dinesh, > > On 29.04.26 07:11, [email protected] wrote: >> From: Dinesh Maniyam <[email protected]> >> >> l4_sp_clk is disabled when i2c device is removed, this would >> causing unexpected failing behavior for other peripherals which >> are still running with l4_sp_clk. The patch removes the codes >> implementation for disabling the lp_spl_clk. >> >> Signed-off-by: Tien Fong Chee <[email protected]> >> Signed-off-by: Dinesh Maniyam <[email protected]> >> --- >> drivers/i2c/designware_i2c.c | 4 ---- >> 1 file changed, 4 deletions(-) >> >> diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c >> index 8ad716f410e..40153c72545 100644 >> --- a/drivers/i2c/designware_i2c.c >> +++ b/drivers/i2c/designware_i2c.c >> @@ -807,10 +807,6 @@ int designware_i2c_remove(struct udevice *dev) >> { >> struct dw_i2c *priv = dev_get_priv(dev); >> >> -#if CONFIG_IS_ENABLED(CLK) >> - clk_disable(&priv->clk); >> -#endif > > Hmm... clock framework should have a counter how many times clock > is enabled... with your patch, clock never gets disabled... > > bye, > Heiko You're right -- this patch is at the wrong layer. designware_i2c is a generic driver and disabling clk_disable() globally affects every SoCFPGA / x86 / RISC-V user of it. The asymmetry vs. clk_enable() in designware_i2c_of_to_plat() is also a refcount leak by construction. I'll send v2 for this patch series with the fix. Regards, Dinesh >> - >> return reset_release_bulk(&priv->resets); >> } >> >> > > -- > Nabla Software Engineering > HRB 40522 Augsburg > Phone: +49 821 45592596 > E-Mail: [email protected] > Geschäftsführer : Stefano Babic
