board_early_init_r() programmed the IOU switch clock and the system timestamp counter directly with readl()/writel() in board code. This is SoC register setup rather than board policy, and the same block is duplicated across the Xilinx SoCs.
Move it into versal2_timer_setup() in arch/arm/mach-versal2 so the board hook only keeps the EL3 guard and calls the helper. Signed-off-by: Michal Simek <[email protected]> --- arch/arm/mach-versal2/cpu.c | 43 +++++++++++++++++++ .../arm/mach-versal2/include/mach/sys_proto.h | 2 + board/amd/versal2/board.c | 38 +--------------- 3 files changed, 46 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-versal2/cpu.c b/arch/arm/mach-versal2/cpu.c index c278dc3d3be5..d28c0e131711 100644 --- a/arch/arm/mach-versal2/cpu.c +++ b/arch/arm/mach-versal2/cpu.c @@ -7,6 +7,8 @@ */ #include <init.h> +#include <log.h> +#include <time.h> #include <asm/armv8/mmu.h> #include <asm/cache.h> #include <asm/global_data.h> @@ -153,6 +155,47 @@ u8 __weak versal2_get_bootmode(void) return bootmode; } +void versal2_timer_setup(void) +{ + u32 val; + + debug("iou_switch ctrl div0 %x\n", + readl(&crlapb_base->iou_switch_ctrl)); + + writel(IOU_SWITCH_CTRL_CLKACT_BIT | + (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), + &crlapb_base->iou_switch_ctrl); + + /* Global timer init - Program time stamp reference clk */ + val = readl(&crlapb_base->timestamp_ref_ctrl); + val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; + writel(val, &crlapb_base->timestamp_ref_ctrl); + + debug("ref ctrl 0x%x\n", + readl(&crlapb_base->timestamp_ref_ctrl)); + + /* Clear reset of timestamp reg */ + writel(0, &crlapb_base->rst_timestamp); + + /* + * Program freq register in System counter and + * enable system counter. + */ + writel(CONFIG_COUNTER_FREQUENCY, + &iou_scntr_secure->base_frequency_id_register); + + debug("counter val 0x%x\n", + readl(&iou_scntr_secure->base_frequency_id_register)); + + writel(IOU_SCNTRS_CONTROL_EN, + &iou_scntr_secure->counter_control_register); + + debug("scntrs control 0x%x\n", + readl(&iou_scntr_secure->counter_control_register)); + debug("timer 0x%llx\n", get_ticks()); + debug("timer 0x%llx\n", get_ticks()); +} + U_BOOT_DRVINFO(soc_amd_versal2) = { .name = "soc_amd_versal2", }; diff --git a/arch/arm/mach-versal2/include/mach/sys_proto.h b/arch/arm/mach-versal2/include/mach/sys_proto.h index b3118c208e8f..b8d12d1dd3bb 100644 --- a/arch/arm/mach-versal2/include/mach/sys_proto.h +++ b/arch/arm/mach-versal2/include/mach/sys_proto.h @@ -19,5 +19,7 @@ u32 versal2_pmc_multi_boot(void); u32 versal2_multi_boot_reg(void); /* Weak bootmode decode (MMIO default); a firmware/SCMI build may override */ u8 versal2_get_bootmode(void); +/* EL3 clock/timer register setup, called from board_early_init_r() */ +void versal2_timer_setup(void); #endif /* _ASM_ARCH_SYS_PROTO_H */ diff --git a/board/amd/versal2/board.c b/board/amd/versal2/board.c index c4e88440d64e..7f2fb4c1ec63 100644 --- a/board/amd/versal2/board.c +++ b/board/amd/versal2/board.c @@ -132,46 +132,10 @@ bool soc_detection(void) int board_early_init_r(void) { - u32 val; - if (current_el() != 3) return 0; - debug("iou_switch ctrl div0 %x\n", - readl(&crlapb_base->iou_switch_ctrl)); - - writel(IOU_SWITCH_CTRL_CLKACT_BIT | - (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), - &crlapb_base->iou_switch_ctrl); - - /* Global timer init - Program time stamp reference clk */ - val = readl(&crlapb_base->timestamp_ref_ctrl); - val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; - writel(val, &crlapb_base->timestamp_ref_ctrl); - - debug("ref ctrl 0x%x\n", - readl(&crlapb_base->timestamp_ref_ctrl)); - - /* Clear reset of timestamp reg */ - writel(0, &crlapb_base->rst_timestamp); - - /* - * Program freq register in System counter and - * enable system counter. - */ - writel(CONFIG_COUNTER_FREQUENCY, - &iou_scntr_secure->base_frequency_id_register); - - debug("counter val 0x%x\n", - readl(&iou_scntr_secure->base_frequency_id_register)); - - writel(IOU_SCNTRS_CONTROL_EN, - &iou_scntr_secure->counter_control_register); - - debug("scntrs control 0x%x\n", - readl(&iou_scntr_secure->counter_control_register)); - debug("timer 0x%llx\n", get_ticks()); - debug("timer 0x%llx\n", get_ticks()); + versal2_timer_setup(); return 0; } -- 2.43.0
