On Mon, Jun 29, 2026 at 05:01:17PM +0530, Balaji Selvanathan wrote:
> The GENI UART hardware can retain stale data in the RX FIFO.
> The msm_serial_pending() function was reporting this stale data as
> pending input, causing U-Boot to incorrectly assume a key press and
> stop at the CLI prompt instead of continuing the boot process.
>
> Add IRQ status validation to distinguish between legitimate received
> data and stale FIFO contents. Check the Secondary IRQ status register
> for RX watermark or last flags before reporting pending data. If the
> FIFO contains data but no valid IRQ flags are set, ignore it as stale.
>
> Signed-off-by: Balaji Selvanathan <[email protected]>
> ---
>  drivers/serial/serial_msm_geni.c | 27 ++++++++++++++++++++++-----
>  1 file changed, 22 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/serial/serial_msm_geni.c 
> b/drivers/serial/serial_msm_geni.c
> index 3dca581f68f..6d30f150966 100644
> --- a/drivers/serial/serial_msm_geni.c
> +++ b/drivers/serial/serial_msm_geni.c
> @@ -424,13 +424,30 @@ static int msm_serial_getc(struct udevice *dev)
>  static int msm_serial_pending(struct udevice *dev, bool input)
>  {
>       struct msm_serial_data *priv = dev_get_priv(dev);
> -
> -     if (input)
> -             return readl(priv->base + SE_GENI_RX_FIFO_STATUS) &
> -                        RX_FIFO_WC_MSK;
> -     else
> +     u32 rx_fifo_status, s_irq_status;
> +     int result;
> +
> +     if (input) {
> +             rx_fifo_status = readl(priv->base + SE_GENI_RX_FIFO_STATUS);
> +             result = rx_fifo_status & RX_FIFO_WC_MSK;
> +
> +             /*
> +              * Validate RX data with IRQ status
> +              * Only report pending data if valid RX IRQ indicators are set.
> +              */
> +             if (result) {
> +                     s_irq_status = readl(priv->base + SE_GENI_S_IRQ_STATUS);
> +
> +                     if (!(s_irq_status & (S_RX_FIFO_WATERMARK_EN | 
> S_RX_FIFO_LAST_EN))) {
> +                             /* No valid RX IRQ, ignore stale data */
> +                             return 0;
> +                     }
> +             }
> +             return result;
> +     } else {
>               return readl(priv->base + SE_GENI_TX_FIFO_STATUS) &
>                          TX_FIFO_WC_MSK;
> +     }
>
>       return 0;

It won't reach here...

Reviewed-by: Varadarajan Narayanan <[email protected]>

>  }
>
> ---
> base-commit: 6902fb4c17faa375003124c451c2550deab5463d
> change-id: 20260629-uart-e07d893e4508
>
> Best regards,
> --
> Balaji Selvanathan <[email protected]>
>

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