Hi Andreas, On 6/29/2026 7:05 PM, Andreas Zdziarstek wrote: > Same rationale as the watchdog: the default second global reset leaves > the SoC hung. Set the TSADC to the first global reset as well, so a > thermal shutdown reliably resets the whole SoC. > > Signed-off-by: Andreas Zdziarstek <[email protected]> > --- > arch/arm/mach-rockchip/rk3568/rk3568.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c > b/arch/arm/mach-rockchip/rk3568/rk3568.c > index 87bd443e9c4..50b61b7cd26 100644 > --- a/arch/arm/mach-rockchip/rk3568/rk3568.c > +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c > @@ -40,6 +40,7 @@ > > #define CRU_BASE 0xfdd20000 > #define WDT_GLB_SRST_CTRL BIT(1) > +#define TSADC_GLB_SRST_CTRL BIT(0) > > /* PMU_GRF_GPIO0D_IOMUX_L */ > enum { > @@ -156,6 +157,9 @@ int arch_cpu_init(void) > /* Make WDT trigger a first global reset */ > setbits_le32(&cru->glb_rst_con, WDT_GLB_SRST_CTRL); > > + /* Make TSADC trigger a first global reset */ > + setbits_le32(&cru->glb_rst_con, TSADC_GLB_SRST_CTRL);
There is likely no need to read and write this reg twice, please combine. Regards, Jonas > + > return 0; > } >
