On Mon, Jun 29, 2026 at 11:51:18PM +0800, Eric Chung wrote: >Add the SDH0 controller node and its pinctrl groups to the u-boot >overlay. The upstream DTS only contains the eMMC node; the SD card >controller (sdhci@d4280000) and its MMC1 pinctrl configuration are >missing. Place the new node inside the storage-bus via path-based >merge so it inherits the dma-ranges from the parent bus. > >Signed-off-by: Eric Chung <[email protected]> > >--- >v2: >- Use vmmc-supply as vqmmc-supply on SD node. >- Add alias of mmc0 and mmc1. >--- > arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi | 87 ++++++++++++++++++++++++++++++- > arch/riscv/dts/k1-musepi-pro-u-boot.dtsi | 82 ++++++++++++++++++++++++++++- > 2 files changed, 165 insertions(+), 4 deletions(-) > >diff --git a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi >b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi >index 7f9443d6951..463952dc047 100644 >--- a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi >+++ b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi >@@ -6,6 +6,11 @@ > #include "binman.dtsi" > > / { >+ aliases { >+ mmc0 = &emmc; >+ mmc1 = &sdhci0; >+ }; >+ > memory@0 { > device_type = "memory"; > reg = <0x00000000 0x00000000 0x00000000 0x80000000>; >@@ -76,12 +81,14 @@ > bootph-pre-ram; > }; > >- buck3 { >+ buck3_1v8: buck3 { > regulator-name = "vdd_1v8"; > bootph-pre-ram; > }; > >- aldo1 { >+ buck4_3v3: buck4 { }; >+ >+ aldo1: aldo1 { > regulator-name = "vdd_1v8_mmc"; > bootph-pre-ram; > }; >@@ -89,6 +96,82 @@ > }; > }; > >+/ { >+ soc { >+ storage-bus { >+ sdhci0: mmc@d4280000 { >+ bootph-pre-ram; >+ compatible = "spacemit,k1-sdhci"; >+ reg = <0x0 0xd4280000 0x0 0x200>; >+ clocks = <&syscon_apmu CLK_SDH_AXI>, >+ <&syscon_apmu CLK_SDH0>; >+ clock-names = "core", "io"; >+ interrupts = <99>; >+ resets = <&syscon_apmu RESET_SDH_AXI>, >+ <&syscon_apmu RESET_SDH0>; >+ reset-names = "sdh_axi", "sdh0"; >+ bus-width = <4>; >+ max-frequency = <204800000>; >+ cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_LOW>; >+ pinctrl-names = "default", "fast";
Still fast, while your driver and changelog says uhs. >+ pinctrl-0 = <&sdhci0_0_cfg>;
