Add clock tree type flags to the mt8188 clock tree structures. These will be used later for parent lookup.
Signed-off-by: David Lechner <[email protected]> --- drivers/clk/mediatek/clk-mt8188.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt8188.c b/drivers/clk/mediatek/clk-mt8188.c index b82a6ab5452..aef60b324b6 100644 --- a/drivers/clk/mediatek/clk-mt8188.c +++ b/drivers/clk/mediatek/clk-mt8188.c @@ -89,6 +89,7 @@ static const struct mtk_clk_tree mt8188_apmixedsys_clk_tree = { .num_ext_clks = ARRAY_SIZE(ext_clock_rates), .plls = apmixed_plls, .num_plls = ARRAY_SIZE(apmixed_plls), + .type = MTK_CLK_TREE_APMIXED, }; #define FIXED_CLK0(_id, _rate) \ @@ -1422,6 +1423,7 @@ static const struct mtk_clk_tree mt8188_topckgen_clk_tree = { .num_fdivs = ARRAY_SIZE(top_fixed_divs), .num_muxes = ARRAY_SIZE(top_muxes), .num_gates = ARRAY_SIZE(topckgen_cg_clks), + .type = MTK_CLK_TREE_TOPCKGEN, }; static const struct mtk_gate_regs infra_ao0_cg_regs = { -- 2.43.0
