Le 15/07/2026 à 01:32, James Hilliard a écrit :
Each ECC error-count register contains four 8-bit correction counts.
The register-offset helper already selects the register using the ECC
block index divided by four, but field extraction shifts by the full
block index. This produces shifts of 32 bits or more for each register
after the first.
Use the block index modulo four when extracting the correction count.
Fixes: 4ccae81cdadc ("mtd: nand: Add the sunxi NAND controller driver")
Signed-off-by: James Hilliard <[email protected]>
Reviewed-by: Richard Genoud <[email protected]>
NB: While the fix is valid, it doesn't change anything at the end since
the step is always 0 here. But it's better to have the right formula anyway.
---
drivers/mtd/nand/raw/sunxi_nand.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.h
b/drivers/mtd/nand/raw/sunxi_nand.h
index 1b2c514852d..96b65c52685 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.h
+++ b/drivers/mtd/nand/raw/sunxi_nand.h
@@ -167,7 +167,7 @@
#define NFC_ECC_PAT_FOUND(x) BIT(x)
#define NFC_ECC_PAT_FOUND_MSK(nfc) ((nfc)->caps->pat_found_mask)
-#define NFC_ECC_ERR_CNT(b, x) (((x) >> ((b) * 8)) & 0xff)
+#define NFC_ECC_ERR_CNT(b, x) (((x) >> (((b) % 4) * 8)) & 0xff)
#define NFC_USER_DATA_LEN_MSK(step) \
(0xf << (((step) % NFC_REG_USER_DATA_LEN_CAPACITY) * 4))
regards,
Richard
