> -----Original Message----- > From: Kuwano Takahiro (ATV MS MPL PAE - MS) > Sent: Friday, July 17, 2026 3:33 PM > To: 'Weijie Gao' <[email protected]>; [email protected] > Cc: [email protected]; [email protected]; [email protected]; > [email protected]; > [email protected]; [email protected]; [email protected]; > [email protected]; > [email protected]; [email protected]; > [email protected]; [email protected] > Subject: RE: [PATCH v6 1/7] mtd: spi-nor-ids: Correct flash flags for > ESMT/EON flashes > > Hi, > > > On Fri, 2026-07-03 at 09:03 +0000, [email protected] wrote: > > > External email : Please do not click links or open attachments until > > > you have verified the sender or the content. > > > > > > > > > Hi, > > > > > > > All currently supported ESMT/EON flashes supports 4KB sector and > > > > dual read. > > > > EN25Q80B also supports 1-1-4 quad read. > > > > > > > > Link: > > > > > > > https://urldefense.com/v3/__https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25Q80B.pdf__;!!CTRNKA9wMg0ARbw > > !j7E681Y4Vzt6S4aIsheiVdVOq9m8dv0YTHDU9h9Bd3fu83ASyITxt4cxou55heRBOS52p8pOfsmu5cjY5uK7MdQnA5YmOgE$ > > > > Link: > > > > > > > https://urldefense.com/v3/__https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25QH128A*20(2TC).pdf__;JQ!!CTR > > NKA9wMg0ARbw!j7E681Y4Vzt6S4aIsheiVdVOq9m8dv0YTHDU9h9Bd3fu83ASyITxt4cxou55heRBOS52p8pOfsmu5cjY5uK7MdQn6Cw3FY0$ > > > > Link: > > > > > > > https://urldefense.com/v3/__https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25S64A(2SC).pdf__;!!CTRNKA9wMg > > 0ARbw!j7E681Y4Vzt6S4aIsheiVdVOq9m8dv0YTHDU9h9Bd3fu83ASyITxt4cxou55heRBOS52p8pOfsmu5cjY5uK7MdQnfRLy1jE$ > > > > Signed-off-by: Weijie Gao <[email protected]> > > > > --- > > > > v6: removed SPI_NOR_QUAD_READ from incompatible flashes > > > > v5: not changed > > > > v3-v4: updated commit message > > > > v2: not changed > > > > --- > > > > drivers/mtd/spi/spi-nor-ids.c | 12 ++++++------ > > > > 1 file changed, 6 insertions(+), 6 deletions(-) > > > > > > > > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi- > > > > nor-ids.c > > > > index c0fa98424aa..0dacb4abdbc 100644 > > > > --- a/drivers/mtd/spi/spi-nor-ids.c > > > > +++ b/drivers/mtd/spi/spi-nor-ids.c > > > > @@ -90,12 +90,12 @@ const struct flash_info spi_nor_ids[] = { > > > > #endif > > > > #ifdef CONFIG_SPI_FLASH_EON /* EON */ > > > > /* EON -- en25xxx */ > > > > - { INFO("en25q80b", 0x1c3014, 0, 64 * 1024, 16, SECT_4K) > > > > }, > > > > - { INFO("en25q32b", 0x1c3016, 0, 64 * 1024, 64, 0) }, > > > > - { INFO("en25q64", 0x1c3017, 0, 64 * 1024, 128, SECT_4K) > > > > }, > > > > - { INFO("en25q128b", 0x1c3018, 0, 64 * 1024, 256, 0) }, > > > > - { INFO("en25qh128", 0x1c7018, 0, 64 * 1024, 256, 0) }, > > > > - { INFO("en25s64", 0x1c3817, 0, 64 * 1024, 128, SECT_4K) > > > > }, > > > > + { INFO("en25q80b", 0x1c3014, 0, 64 * 1024, 16, SECT_4K > > > > | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > > > + { INFO("en25q32b", 0x1c3016, 0, 64 * 1024, 64, SECT_4K > > > > | SPI_NOR_DUAL_READ) }, > > > > + { INFO("en25q64", 0x1c3017, 0, 64 * 1024, 128, SECT_4K > > > > | SPI_NOR_DUAL_READ) }, > > > > + { INFO("en25q128b", 0x1c3018, 0, 64 * 1024, 256, SECT_4K > > > > | SPI_NOR_DUAL_READ) }, > > > > + { INFO("en25qh128", 0x1c7018, 0, 64 * 1024, 256, SECT_4K > > > > | SPI_NOR_DUAL_READ) }, > > > > + { INFO("en25s64", 0x1c3817, 0, 64 * 1024, 128, SECT_4K > > > > | SPI_NOR_DUAL_READ) }, > > > > > > In our discussion in previous revision [1], only en25qh128 supports > > > 1-1-4 > > > read and program, but you set QUAD_READ flag in en25q80b instead. > > > Please fix. > > > > I reserved this flag because I found a newer datasheet that claims it > > supports the 6B opcode for 1-1-4 read: > > > > https://www.novitronic.com/Datenbl%C3%A4tter/Aktive%20Komponenten/EN25Q80B%282C%29.pdf > > > But why did you drop QUAD_READ flag from en25qh128? > Per datasheet, it supports both 1-1-4 read and program. > > > As the EN25Q80B is EOL, I can't buy one for testing. I'll remove this > > flag in next patch series. > > > I would recommend not to add EOL chips. > We should not expand ID database for chips that nobody has chance to use. > Oh sorry, my bad. You don't try to add this chip. Please ignore my comment.
> Thanks, > Takahiro
