I know I'm a bit late to this, but this doesn't sound right. MII isn't a very flexible protocol. The registers have to fit in 5 bits. In order for larger values to be used, you would need to be using clause 45 of MDIO, which requires not just 16-bit register offsets, but an additional argument (device address). There is currently support for clause 45 in the newer U-Boot PHY Lib code.
On Mon, Jul 25, 2011 at 12:50 AM, Hebbar, Gururaja <[email protected]> wrote: > Hi, > > We have an upcoming SOC with Ethernet controller which has registers with > offsets crossing 0x110. > In order to access these registers, we use miiphy_read() & miiphy_write() api > provided by Standard u-boot mii phy util code (common/miiphyutil.c). > > However the syntax of miiphy_read() & miiphy_write() is as below > > int miiphy_read (char *devname, unsigned char addr, unsigned char reg, > unsigned short *value); > > int miiphy_write (char *devname, unsigned char addr, unsigned char reg, > unsigned short value); > > Here the "reg" argument is of type "unsigned char" which limits the offset to > a max of 0xff. > In linux, they are using u32 as type. > > Right now we have modified the type to short and using it. > > Is this correct? > If yes, can we send a patch for the same? > If not, what is the alternative? > > Thanks & Regards > Gururaja > > _______________________________________________ > U-Boot mailing list > [email protected] > http://lists.denx.de/mailman/listinfo/u-boot > _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
