This commit is fixing the problem with DMA (SDMA in Samsung MMC controller) transfer for D Cache enabled. The D Cache corresponding to the DMA buffer shall be flushed before transfer and invalidated when transfer is completed.
Signed-off-by: Lukasz Majewski <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Cc: Minkyu Kang <[email protected]> CC: Andy Fleming <[email protected]> CC: Albert ARIBAUD <[email protected]> --- drivers/mmc/s5p_mmc.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/s5p_mmc.c b/drivers/mmc/s5p_mmc.c index f136813..6bc2eb5 100644 --- a/drivers/mmc/s5p_mmc.c +++ b/drivers/mmc/s5p_mmc.c @@ -54,6 +54,9 @@ static void mmc_prepare_data(struct mmc_host *host, struct mmc_data *data) /* We do not handle DMA boundaries, so set it to max (512 KiB) */ writew((7 << 12) | (data->blocksize & 0xFFF), &host->reg->blksize); writew(data->blocks, &host->reg->blkcnt); + + flush_dcache_range((u32)data->dest, + (u32)data->dest + (data->blocks * data->blocksize)); } static void mmc_set_transfer_mode(struct mmc_host *host, struct mmc_data *data) @@ -237,6 +240,10 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, break; } else if (mask & (1 << 1)) { /* Transfer Complete */ + invalidate_dcache_range((u32)data->dest, + (u32)data->dest + + (data->blocks * + data->blocksize)); debug("r/w is done\n"); break; } -- 1.7.2.3 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
