On Friday, August 19, 2011 11:23:13 AM Hong Xu wrote:
> The default cache operations defined in arch/arm/lib/cache.c
> do not perform any real cache operation, and instead a WARNING
> will be emitted.
> 
> Signed-off-by: Hong Xu <hong...@atmel.com>
> Tested-by: Elen Song <elen.s...@atmel.com>
> CC: Albert Aribaud <albert.u.b...@aribaud.net>

You can add my:

Tested-by: Marek Vasut <marek.va...@gmail.com>
Acked-by: Marek Vasut <marek.va...@gmail.com>

Cheers!
> ---
> Since V1
>     Modified copyright line
>     Used `debug' to replace `printf'
> 
>  arch/arm/lib/cache.c |   58
> +++++++++++++++++++++++++++---------------------- 1 files changed, 32
> insertions(+), 26 deletions(-)
> 
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index 92b61a2..ce9b712 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -1,6 +1,5 @@
>  /*
> - * (C) Copyright 2002
> - * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
> + * (C) Copyright 2011 Atmel Corporation
>   *
>   * See file CREDITS for list of people who contributed to this
>   * project.
> @@ -20,36 +19,43 @@
>   * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>   * MA 02111-1307 USA
>   */
> +#include <linux/compiler.h>
> +#include <common.h>
> 
> -/* for now: just dummy functions to satisfy the linker */
> +#define EMIT_WARNING debug("WARNING: %s - CPU cache operation is not " \
> +"implemented!\n", __func__)
> 
> -#include <common.h>
> +/*
> + * Default implementations
> + *
> + * Warn user if CPU code does not implement necessary cache functions
> + */
> +void __weak flush_cache(unsigned long start, unsigned long size)
> +{
> +     EMIT_WARNING;
> +}
> 
> -void  __flush_cache(unsigned long start, unsigned long size)
> +void __weak flush_dcache_all(void)
>  {
> -#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
> -     void arm1136_cache_flush(void);
> +     EMIT_WARNING;
> +}
> 
> -     arm1136_cache_flush();
> -#endif
> -#ifdef CONFIG_ARM926EJS
> -     /* test and clean, page 2-23 of arm926ejs manual */
> -     asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
> -     /* disable write buffer as well (page 2-22) */
> -     asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
> -#endif
> -     return;
> +void __weak flush_dcache_range(unsigned long start, unsigned long stop)
> +{
> +     EMIT_WARNING;
>  }
> -void  flush_cache(unsigned long start, unsigned long size)
> -     __attribute__((weak, alias("__flush_cache")));
> 
> -/*
> - * Default implementation:
> - * do a range flush for the entire range
> - */
> -void __flush_dcache_all(void)
> +void __weak invalidate_dcache_range(unsigned long start, unsigned long
> stop) +{
> +     EMIT_WARNING;
> +}
> +
> +void __weak invalidate_dcache_all(void)
> +{
> +     EMIT_WARNING;
> +}
> +
> +void __weak invalidate_icache_all(void)
>  {
> -     flush_cache(0, ~0);
> +     EMIT_WARNING;
>  }
> -void flush_dcache_all(void)
> -     __attribute__((weak, alias("__flush_dcache_all")));
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