Hi Tom, On Thu, Oct 13, 2011 at 5:06 PM, Tom Warren <[email protected]> wrote: > Simon, > >> -----Original Message----- >> From: [email protected] [mailto:[email protected]] On Behalf Of Simon Glass >> Sent: Wednesday, October 12, 2011 2:13 PM >> To: Anton Staaf >> Cc: U-Boot Mailing List; Tom Warren >> Subject: Re: [U-Boot] [RESEND PATCH v2] tegra2: Enable data cache >> >> Hi Anton, >> >> On Wed, Oct 12, 2011 at 10:54 AM, Anton Staaf <[email protected]> wrote: >> > On Tue, Oct 11, 2011 at 5:35 PM, Simon Glass <[email protected]> wrote: >> >> This enables the data cache on Tegra2 boards. >> >> >> >> As discussed on the list, this is better off in the Tegra2 cpu code than >> in a >> >> particular vendor directory. We should be safe turning on the cache for >> all >> >> Tegra2 boards. >> > >> > I don't think it's safe to turn on caches yet for Tegra. I have some MMC >> driver >> > fixes I'll send up shortly that deal with unaligned DMA requests that are >> > required before turning on caches. Without these some MMC >> > transactions just hang. >> >> Yes that's right since yesterday's merge of MMC into u-boot-arm (prior >> to that there was no working MMC!). Let's hold off applying this patch >> until you are done. >> > > I have to disagree with the 'no working MMC' statement. When I submitted my > Tegra2 MMC driver in May, it was working fine on Seaboard (hadn't tested yet > on Harmony since mine was dead). At that time, DCACHE was off, so no > concurrency issues nor hangs were seen. Wolfgang merged it w/master in > mid-July. > > Just correcting for the record,
Yes I suspect you are right, it could just be my Seaboard - I have a different one from what I was using a few months ago. With this new one I see: HEAD is now at 8380095... mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony Tegra2 (SeaBoard) # mmc part 0 Card did not respond to voltage select! ## Unknown partition table Tegra2 (SeaBoard) # mmc part 1 Card did not respond to voltage select! ## Unknown partition table Tegra2 (SeaBoard) # I also remember that it worked, so I put it down to the hardware change. So, sorry for getting this wrong. Regards, Simon > > Tom >> Regards, >> Simon >> >> > >> > Thanks, >> > Anton >> > >> >> Signed-off-by: Simon Glass <[email protected]> >> >> --- >> >> Changes in v2: >> >> - Enable caches for all Tegra2 boards instead of just Nvidia ones >> >> >> >> arch/arm/cpu/armv7/tegra2/board.c | 8 ++++++++ >> >> 1 files changed, 8 insertions(+), 0 deletions(-) >> >> >> >> diff --git a/arch/arm/cpu/armv7/tegra2/board.c >> b/arch/arm/cpu/armv7/tegra2/board.c >> >> index 9061d18..a996b88 100644 >> >> --- a/arch/arm/cpu/armv7/tegra2/board.c >> >> +++ b/arch/arm/cpu/armv7/tegra2/board.c >> >> @@ -86,3 +86,11 @@ int checkboard(void) >> >> return 0; >> >> } >> >> #endif /* CONFIG_DISPLAY_BOARDINFO */ >> >> + >> >> +#ifndef CONFIG_SYS_DCACHE_OFF >> >> +void enable_caches(void) >> >> +{ >> >> + /* Enable D-cache. I-cache is already enabled in start.S */ >> >> + dcache_enable(); >> >> +} >> >> +#endif >> >> -- >> >> 1.7.3.1 >> >> >> >> _______________________________________________ >> >> U-Boot mailing list >> >> [email protected] >> >> http://lists.denx.de/mailman/listinfo/u-boot >> >> >> > > ----------------------------------------------------------------------------------- > This email message is for the sole use of the intended recipient(s) and may > contain > confidential information. Any unauthorized review, use, disclosure or > distribution > is prohibited. If you are not the intended recipient, please contact the > sender by > reply email and destroy all copies of the original message. > ----------------------------------------------------------------------------------- > _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
