On Fri, Nov 25, 2011 at 4:18 AM, Jason Liu <jason....@linaro.org> wrote:
> The mmc host controller on the i.mx6q is called usdhc which
> is redesigned based on the freescale esdhc controller.
>
> The usdhc controller is almost compatible with esdhc except
> it adds one mix register to support debug/SD3.0 and move
> the low bit 0-6 of XFERTYP register to the mix control reg
> low bit 0-6. Thus on i.mx6q, we have the following compared
> with the previous soc: (can refer to RM of chapter 56.3.3)
>
> i.mx6q:
> mix control:
> bit 31 - bit 7: Added for debug/SD3.0 support
> bit 6  - bit 0: move in the XFERTYP register bit 6-0 on previous soc
> XFERTYP register:
> bit 31 - bit 7: the same as before,
> bit 6  - bit 0: no-use
>
> previous soc
> mix control: no
> XFERTYP register:
> bit 31 - bit 0: xfertype information
>
> Signed-off-by: Jason Liu <jason....@linaro.org>
> Cc: Andy Fleming <aflem...@gmail.com>
> Cc: Stefano Babic <sba...@denx.de>
> Acked-by: Stefano Babic <sba...@denx.de>

Applied to mmc-next branch, thanks!

Andy
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