Hi Robert, On 1/25/12, Marek Vasut <[email protected]> wrote:
>> Shouldn't we configure clkctrl_frac0 - or at least disable CPU clock >> gating - before disabling PLL bypass? > > This seems reasonable. Fabio, can you comment? Could you please post a patch with your proposed change so that we can test it? Regards, Fabio Estevam _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
