The DC power STS shouldn't be checked if booting off 5V supply.
Signed-off-by: Marek Vasut <marek.va...@gmail.com>
Cc: Wolfgang Denk <w...@denx.de>
Cc: Detlev Zundel <d...@denx.de>
Cc: Stefano Babic <sba...@denx.de>
Cc: Robert Deliën <rob...@delien.nl>
Cc: Fabio Estevam <feste...@gmail.com>
Cc: Matthias Fuchs <matthias.fu...@esd.eu>
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 16 ++++++++++++----
1 files changed, 12 insertions(+), 4 deletions(-)
Note: Guys, please give this a testrun. I think it might fix the issue Robert
was observing. I dug into the imx-bootlets and the bootrom X-Files and found
this paranormal piece of code. Adding it fixes the boot issue on my crappy
board.
M
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index ee0f237..c6c25d9 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -802,7 +802,9 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
new_brownout)
clrsetbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_TRG_MASK, diff);
- if (powered_by_linreg)
+ if (powered_by_linreg ||
+ (readl(&power_regs->hw_power_sts) &
+ POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500);
else {
while (!(readl(&power_regs->hw_power_sts) &
@@ -837,7 +839,9 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
new_brownout)
clrsetbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_TRG_MASK, diff);
- if (powered_by_linreg)
+ if (powered_by_linreg ||
+ (readl(&power_regs->hw_power_sts) &
+ POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500);
else {
while (!(readl(&power_regs->hw_power_sts) &
@@ -895,7 +899,9 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t
new_brownout)
clrsetbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_TRG_MASK, diff);
- if (powered_by_linreg)
+ if (powered_by_linreg ||
+ (readl(&power_regs->hw_power_sts) &
+ POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500);
else {
while (!(readl(&power_regs->hw_power_sts) &
@@ -930,7 +936,9 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t
new_brownout)
clrsetbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_TRG_MASK, diff);
- if (powered_by_linreg)
+ if (powered_by_linreg ||
+ (readl(&power_regs->hw_power_sts) &
+ POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500);
else {
while (!(readl(&power_regs->hw_power_sts) &
--
1.7.8.3
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