> Hi Marek, > > On Tue, Feb 7, 2012 at 2:53 PM, Marek Vasut <[email protected]> wrote: > >> From: Robert Delien <[email protected]> > >> > >> This patch prevents the needless switching on and off of PLL bypass > >> mode. With this patch in place, single-stepping through the SPL is > >> now possible. > > > > Why did FSL have it in the bootlets though? Fabio, can you explain? > > Anson (in Cc) explained the following: > > "The switch of CPU clock is to make our EVK board can boot up the > uboot and kernel with less than 100mA power consumption to meet the > USB specification, because there is chance that the EVK board is power > by USB cable only, we need to make sure in this scenario, before USB > enum done, the total power consumption for our EVK board should be > less than 100mA, but if CPU running with PLL on, the power consumption > is > 100mA under uboot, so we need to disable PLL and switch CPU clock > to XTAL before USB enum done." >
And by running off XTAL, the consumption grows so dramatically? M _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
