Dear Ilya Averyanov, > 2012/4/23 Marek Vasut <ma...@denx.de> > > > Dear Ilya Averyanov, > > > > > Dear Marek Vasut, > > > > > > Would you please explain, why do you want to initialize the sdram has > > > > been > > > > > in C code. > > > > Ok, no problem: > > - You'll be able to call get_ram_size() to scan for ram size as any other > > board > > - SDRAM driver will fit properly into the driver model once it's in place > > (WIP, > > wanna volunteer for review process?) > > - It's much cleaner > > > > > If for provide this feature should be written assembly code. And it > > > would sometimes even harder than the initialization code sdram? > > > > What do you mean? > > If we use 4kb of SRAM (steppingstone), then at least need to edit > u-boot/arch/arm/cpu/arm920t/start.S, to add a test from there was a boot > (NAND or NOR). Edit the address stack. etc ... > Use the MMU cache for the stack, even a little better, but it is more > difficult.
Just check where you have SRAM and adjust SP accordingly, it's easy :-) > > > Ah yes, just a remark, please don't top-post. Notice how other people > > don't do > > it -- I know gmail does it out-of-the-box, but that doesn't mean it's > > correct. > > > > Ok. > > > > > 2012/4/21 Marek Vasut <ma...@denx.de> > > > > > > > Dear Ilya Averyanov, > > > > > > > > > 2012/4/21 Vasily Khoruzhick <anars...@gmail.com> > > > > > > > > > > > 2012/4/21 Ilya Averyanov <averyanovin+ub...@gmail.com>: > > > > > > > No have problem. > > > > > > > Available only if you boot from NOR flash. > > > > > > > If you boot from the NAND 4kb of SRAM (steppingstone) not > > > > > > > available. > > > > > > > > > > > > For NAND boot it's mapped at 0x0 > > > > > > For NOR boot it's mapped at 0x40000000 > > > > > > > > > > > > NAND controller uses it for booting purpose, but anyway for SPL > > > > > > we should fit code into > > > > > > 4k (hardware limitation), so I think using assembly here for > > > > > > SDRAM init is OK. > > > > > > > > > > > > And how will you use the internal SRAM when you boot from NAND, > > > > > > if the SoC > > > > > > > > > > writes in the SDRAM read data from NAND, and your data will be > > > > > > > > overwritten. > > > > > > > > Why? You'll load SPL into SRAM, then in SPL you'll copy the rest of > > > > uboot > > > > > > from > > > > NAND to - then already inited - SDRAM and execute it. We even have > > > > ready-to-use > > > > NAND SPL. > > > > > > > > > > Regards > > > > > > Vasily > > > > > > > > Best regards, > > > > Marek Vasut > > > > Best regards, > > Marek Vasut Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot