>From: Marek Vasut [mailto:marek.va...@gmail.com]
>Sent: Thursday, June 21, 2012 6:16 PM
>> --- a/drivers/usb/host/ehci-tegra.c
>> +++ b/drivers/usb/host/ehci-tegra.c
>> @@ -1,5 +1,5 @@
>> /*
>> - * Copyright (c) 2009 NVIDIA Corporation
>> + * Copyright (c) 2009-2012 NVIDIA Corporation
>> *
>> * See file CREDITS for list of people who contributed to this
>> * project.
>> @@ -29,6 +29,22 @@
>> #include <asm/errno.h>
>> #include <asm/arch/usb.h>
>>
>> +/*
>> + * A known hardware issue where Connect Status Change bit of PORTSC
>> register + * of USB1 controller will be set after Port Reset.
>> + * We have to clear it in order for later device enumeration to proceed.
>> + * This ehci_powerup_fixup overrides the weak function ehci_powerup_fixup
>> + * in "ehci-hcd.c".
>> + */
>> +void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
>
>So it was even enough to use the already preinstalled callback? :-)
Yes.
>> +{
>> + mdelay(50);
>> + if (((u32) status_reg & 0xFFFFC000) != TEGRA_USB1_BASE)
>
>What's this magic number here?
Address Mask value, any suggestion?
>> + return;
> + /* For EHCI_PS_CSC to be cleared in ehci_hcd.c */
>> + if (ehci_readl(status_reg) & EHCI_PS_CSC)
>> + *reg |= EHCI_PS_CSC;
>
>writel()
The real IO write (ehci_writel) is done in ehci-hcd.c after calling of
ehci_powerup_fixup.
Any suggestion?
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