Jim, > -----Original Message----- > From: Jim Lin > Sent: Sunday, June 24, 2012 11:41 PM > To: 'u-boot@lists.denx.de' > Cc: Tom Warren; Marek Vasut; 'Stephen Warren' > Subject: [PATCH v5 1/1] tegra: usb: Fix device enumeration problem of USB1 This patch has been applied to u-boot-tegra/master. Thanks!
Tom > > A known hardware issue of USB1 port where bit 1 (connect status > change) of PORTSC register will be set after issuing Port Reset (like "usb > reset" in u-boot command line). > This will be treated as an error and stops later device enumeration. > > Therefore we clear that bit after Port Reset in order to proceed later > device enumeration. > > Signed-off-by: Jim Lin <ji...@nvidia.com> > --- > To reproduce this issue, you can modify board .dts file to set as the > following to build u-boot binary. > " > usb0 = "/usb@c5000000"; > usb1 = "/usb@c5008000"; > " > Install device on USB1 port (address at 0xc5000000). > And run "usb reset" in u-boot console to enumerate device. > > Before adding this patch, we could see problem every time. > After adding, tried 10 times of "usb reset", "usb tree", "usb stop" > , without seeing issue. > > Changes in v5: > - Define USB address mask value in header file > > Changes in v4: > - Add comment to describe replacing weak function ehci_powerup_fixup of > ehci-hcd.c > - Remove using variable my_reg > > Changes in v3: > - Move patch for USB1 controller into ehci_powerup_fixup of ehci-tegra.c > - Update copyright year to 2012 > > Changes in v2: > - Change config name > - Add a callback function at the end of ehci_submit_root() function > > arch/arm/include/asm/arch-tegra2/tegra2.h | 1 + > drivers/usb/host/ehci-tegra.c | 18 +++++++++++++++++- > 2 files changed, 18 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h > b/arch/arm/include/asm/arch-tegra2/tegra2.h > index d4ada10..710334b 100644 > --- a/arch/arm/include/asm/arch-tegra2/tegra2.h > +++ b/arch/arm/include/asm/arch-tegra2/tegra2.h > @@ -45,6 +45,7 @@ > #define NV_PA_CSITE_BASE 0x70040000 > #define TEGRA_USB1_BASE 0xC5000000 > #define TEGRA_USB3_BASE 0xC5008000 > +#define TEGRA_USB_ADDR_MASK 0xFFFFC000 > > #define TEGRA2_SDRC_CS0 NV_PA_SDRAM_BASE > #define LOW_LEVEL_SRAM_STACK 0x4000FFFC > diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c > index a7e105b..4646b29 100644 > --- a/drivers/usb/host/ehci-tegra.c > +++ b/drivers/usb/host/ehci-tegra.c > @@ -1,5 +1,5 @@ > /* > - * Copyright (c) 2009 NVIDIA Corporation > + * Copyright (c) 2009-2012 NVIDIA Corporation > * > * See file CREDITS for list of people who contributed to this > * project. > @@ -29,6 +29,22 @@ > #include <asm/errno.h> > #include <asm/arch/usb.h> > > +/* > + * A known hardware issue where Connect Status Change bit of PORTSC > +register > + * of USB1 controller will be set after Port Reset. > + * We have to clear it in order for later device enumeration to proceed. > + * This ehci_powerup_fixup overrides the weak function > +ehci_powerup_fixup > + * in "ehci-hcd.c". > + */ > +void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) { > + mdelay(50); > + if (((u32) status_reg & TEGRA_USB_ADDR_MASK) != TEGRA_USB1_BASE) > + return; > + /* For EHCI_PS_CSC to be cleared in ehci_hcd.c */ > + if (ehci_readl(status_reg) & EHCI_PS_CSC) > + *reg |= EHCI_PS_CSC; > +} > > /* > * Create the appropriate control structures to manage > -- > 1.7.3 -- nvpublic _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot