The only file including km82xx-common.h is km82xx.h.
So there is no need to have it as a separate file.

Signed-off-by: Gerlando Falauto <gerlando.fala...@keymile.com>
---
Changes from v1:
  switched to git v1.7.10.4, used git format-patch -M -C -B
---
 include/configs/{km/km82xx-common.h => km82xx.h} |  128 +++++++++++++++++++++-
 1 file changed, 124 insertions(+), 4 deletions(-)
 rename include/configs/{km/km82xx-common.h => km82xx.h} (75%)

diff --git a/include/configs/km/km82xx-common.h b/include/configs/km82xx.h
similarity index 75%
rename from include/configs/km/km82xx-common.h
rename to include/configs/km82xx.h
index 2c763bb..9bfb8df 100644
--- a/include/configs/km/km82xx-common.h
+++ b/include/configs/km82xx.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2007-2010
+ * (C) Copyright 2007-2011
  * Heiko Schocher, DENX Software Engineering, h...@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -21,10 +21,130 @@
  * MA 02111-1307 USA
  */
 
-#ifndef __KM82XX_COMMON
-#define __KM82XX_COMMON
+#ifndef __CONFIG_H
+#define __CONFIG_H
 
 /*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC8247
+/* MGCOGE */
+#if defined(CONFIG_MGCOGE)
+#define CONFIG_HOSTNAME                mgcoge
+#define CONFIG_KM_BOARD_EXTRA_ENV      ""
+
+/* MGCOGE3NE */
+#elif defined(CONFIG_MGCOGE3NE)
+#define CONFIG_HOSTNAME                mgcoge3ne
+#define CONFIG_KM_82XX
+#define CONFIG_KM_BOARD_EXTRA_ENV      "bobcatreset=true\0"
+
+#else
+#error ("Board unsupported")
+#endif
+
+#define        CONFIG_SYS_TEXT_BASE    0xFE000000
+
+/* include common defines/options for all Keymile boards */
+#include "km/keymile-common.h"
+#include "km/km-powerpc.h"
+
+#define CONFIG_SYS_SDRAM_BASE          0x00000000
+#define CONFIG_SYS_FLASH_BASE          0xFE000000
+#define CONFIG_SYS_FLASH_SIZE          32
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+
+/* MGCOGE */
+#if defined(CONFIG_MGCOGE)
+#define CONFIG_SYS_MAX_FLASH_BANKS     3
+/* max num of sects on one chip */
+#define CONFIG_SYS_MAX_FLASH_SECT      512
+
+#define CONFIG_SYS_FLASH_BASE_1        0x50000000
+#define CONFIG_SYS_FLASH_SIZE_1        32
+#define CONFIG_SYS_FLASH_BASE_2        0x52000000
+#define CONFIG_SYS_FLASH_SIZE_2        32
+
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
+                                       CONFIG_SYS_FLASH_BASE_1, \
+                                       CONFIG_SYS_FLASH_BASE_2 }
+#define MTDIDS_DEFAULT         "nor3=app"
+
+/*
+ * Bank 1 - 60x bus SDRAM
+ */
+#define SDRAM_MAX_SIZE 0x08000000                      /* max. 128 MB  */
+#define CONFIG_SYS_GLOBAL_SDRAM_LIMIT  (256 << 20)     /* less than 256 MB */
+
+/* SDRAM initialization values
+*/
+
+#define CONFIG_SYS_OR1 ((~(CONFIG_SYS_GLOBAL_SDRAM_LIMIT-1) & \
+                          ORxS_SDAM_MSK)               |\
+                       ORxS_BPD_8                      |\
+                       ORxS_ROWST_PBI0_A7              |\
+                       ORxS_NUMR_13)
+
+#define CONFIG_SYS_PSDMR (                             \
+                       PSDMR_SDAM_A14_IS_A5            |\
+                       PSDMR_BSMA_A14_A16              |\
+                       PSDMR_SDA10_PBI0_A9             |\
+                       PSDMR_RFRC_5_CLK                |\
+                       PSDMR_PRETOACT_2W               |\
+                       PSDMR_ACTTORW_2W                |\
+                       PSDMR_LDOTOPRE_1C               |\
+                       PSDMR_WRC_1C                    |\
+                       PSDMR_CL_2)
+
+/* MGCOGE3NE */
+#elif defined(CONFIG_MGCOGE3NE)
+#define CONFIG_SYS_MAX_FLASH_BANKS     2       /* max num of flash banks */
+#define CONFIG_SYS_MAX_FLASH_SECT      1024    /*
+                                                * max num of sects on one
+                                                * chip
+                                                */
+
+#define CONFIG_SYS_FLASH_BASE_1        0x50000000
+#define CONFIG_SYS_FLASH_SIZE_1        128
+
+#define CONFIG_SYS_FLASH_SIZE_2 0      /* dummy value to calc SYS_OR5 */
+
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
+                                       CONFIG_SYS_FLASH_BASE_1 }
+
+#define MTDIDS_DEFAULT         "nor2=app"
+
+/*
+ * Bank 1 - 60x bus SDRAM
+ * mgcoge3ne has 256M.
+ */
+#define SDRAM_MAX_SIZE 0x10000000                      /* max. 256 MB  */
+#define CONFIG_SYS_GLOBAL_SDRAM_LIMIT  (512 << 20)     /* less than 512 MB */
+
+#define CONFIG_SYS_OR1 ((~(CONFIG_SYS_GLOBAL_SDRAM_LIMIT-1) & \
+                          ORxS_SDAM_MSK)               |\
+                       ORxS_BPD_4                      |\
+                       ORxS_ROWST_PBI1_A4              |\
+                       ORxS_NUMR_13)
+
+#define CONFIG_SYS_PSDMR (                             \
+                       PSDMR_PBI                       |\
+                       PSDMR_SDAM_A17_IS_A5            |\
+                       PSDMR_BSMA_A13_A15              |\
+                       PSDMR_SDA10_PBI1_A6             |\
+                       PSDMR_RFRC_5_CLK                |\
+                       PSDMR_PRETOACT_2W               |\
+                       PSDMR_ACTTORW_2W                |\
+                       PSDMR_LDOTOPRE_1C               |\
+                       PSDMR_WRC_2C                    |\
+                       PSDMR_CL_2)
+#endif /* defined(CONFIG_MGCOGE3NE) */
+
+/* include further common stuff for all keymile 82xx boards */
+/*
  * Select serial console configuration
  *
  * If either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then
@@ -314,4 +434,4 @@ int get_scl(void);
 #define OF_TBCLK               (bd->bi_busfreq / 4)
 #define OF_STDOUT_PATH         "/soc/cpm/serial@11a90"
 
-#endif /* __KM82XX_COMMON */
+#endif /* __CONFIG_H */
-- 
1.7.10.4

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