From: Mike Frysinger <[email protected]>

The static memory controller is how people connect flashes to newer
Blackfin processors, so add knobs for people to program settings if
they so desire.

Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Sonic Zhang <[email protected]>
Signed-off-by: Bob Liu <[email protected]>
---
 arch/blackfin/cpu/initcode.h |   51 ++++++++++++++++++++++++++++++++++++++----
 1 file changed, 47 insertions(+), 4 deletions(-)

diff --git a/arch/blackfin/cpu/initcode.h b/arch/blackfin/cpu/initcode.h
index d263ab3..0b8c033 100644
--- a/arch/blackfin/cpu/initcode.h
+++ b/arch/blackfin/cpu/initcode.h
@@ -50,13 +50,12 @@ program_async_controller(ADI_BOOT_DATA *bs)
        serial_putc('a');
 
 #ifdef __ADSPBF60x__
-
-#else /* __ADSPBF60x__ */
-
        /* Program the async banks controller. */
+#ifdef EBIU_AMGCTL
        bfin_write_EBIU_AMBCTL0(CONFIG_EBIU_AMBCTL0_VAL);
        bfin_write_EBIU_AMBCTL1(CONFIG_EBIU_AMBCTL1_VAL);
        bfin_write_EBIU_AMGCTL(CONFIG_EBIU_AMGCTL_VAL);
+#endif
 
        serial_putc('b');
 
@@ -73,8 +72,52 @@ program_async_controller(ADI_BOOT_DATA *bs)
 # endif
 #endif
 
-#endif
        serial_putc('c');
+
+#else  /* __ADSPBF60x__ */
+       /* Program the static memory controller. */
+# ifdef CONFIG_SMC_GCTL_VAL
+       bfin_write_SMC_GCTL(CONFIG_SMC_GCTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B0CTL_VAL
+       bfin_write_SMC_B0CTL(CONFIG_SMC_B0CTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B0TIM_VAL
+       bfin_write_SMC_B0TIM(CONFIG_SMC_B0TIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B0ETIM_VAL
+       bfin_write_SMC_B0ETIM(CONFIG_SMC_B0ETIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B1CTL_VAL
+       bfin_write_SMC_B1CTL(CONFIG_SMC_B1CTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B1TIM_VAL
+       bfin_write_SMC_B1TIM(CONFIG_SMC_B1TIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B1ETIM_VAL
+       bfin_write_SMC_B1ETIM(CONFIG_SMC_B1ETIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B2CTL_VAL
+       bfin_write_SMC_B2CTL(CONFIG_SMC_B2CTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B2TIM_VAL
+       bfin_write_SMC_B2TIM(CONFIG_SMC_B2TIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B2ETIM_VAL
+       bfin_write_SMC_B2ETIM(CONFIG_SMC_B2ETIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B3CTL_VAL
+       bfin_write_SMC_B3CTL(CONFIG_SMC_B3CTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B3TIM_VAL
+       bfin_write_SMC_B3TIM(CONFIG_SMC_B3TIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B3ETIM_VAL
+       bfin_write_SMC_B3ETIM(CONFIG_SMC_B3ETIM_VAL);
+# endif
+
+#endif
+       serial_putc('d');
 }
 
 #endif
-- 
1.7.9.5


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