The P5040 does not have SRIO, so don't put the SRIO definitions in
corenet_ds.h.  They belong in the board-specific header files.

Signed-off-by: Timur Tabi <ti...@freescale.com>
---
 include/configs/P3041DS.h    |    4 ++++
 include/configs/P4080DS.h    |    4 ++++
 include/configs/P5020DS.h    |    4 ++++
 include/configs/corenet_ds.h |    4 ----
 4 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h
index 98e7a42..cf184e7 100644
--- a/include/configs/P3041DS.h
+++ b/include/configs/P3041DS.h
@@ -36,6 +36,10 @@
 #define CONFIG_PCIE4
 #define CONFIG_SYS_DPAA_RMAN
 
+#define CONFIG_SYS_SRIO
+#define CONFIG_SRIO1                   /* SRIO port 1 */
+#define CONFIG_SRIO2                   /* SRIO port 2 */
+
 #define CONFIG_ICS307_REFCLK_HZ                25000000  /* ICS307 ref clk 
freq */
 
 #include "corenet_ds.h"
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index d6f2f5c..53979dd 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -33,6 +33,10 @@
 #define CONFIG_MMC
 #define CONFIG_PCIE3
 
+#define CONFIG_SYS_SRIO
+#define CONFIG_SRIO1                   /* SRIO port 1 */
+#define CONFIG_SRIO2                   /* SRIO port 2 */
+
 #define CONFIG_ICS307_REFCLK_HZ                33333000  /* ICS307 ref clk 
freq */
 
 #include "corenet_ds.h"
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h
index 8625f76..7018d7a 100644
--- a/include/configs/P5020DS.h
+++ b/include/configs/P5020DS.h
@@ -37,6 +37,10 @@
 #define CONFIG_SYS_FSL_RAID_ENGINE
 #define CONFIG_SYS_DPAA_RMAN
 
+#define CONFIG_SYS_SRIO
+#define CONFIG_SRIO1                   /* SRIO port 1 */
+#define CONFIG_SRIO2                   /* SRIO port 2 */
+
 #define CONFIG_ICS307_REFCLK_HZ                25000000  /* ICS307 ref clk 
freq */
 
 #include "corenet_ds.h"
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index f4f9bd1..0f59fb2 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -76,10 +76,6 @@
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
-#define CONFIG_SYS_SRIO
-#define CONFIG_SRIO1                   /* SRIO port 1 */
-#define CONFIG_SRIO2                   /* SRIO port 2 */
-
 #define CONFIG_FSL_LAW                 /* Use common FSL init code */
 
 #define CONFIG_ENV_OVERWRITE
-- 
1.7.3.4


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