On 7/18/26 11:16 AM, Carlo Caione wrote:
> The Genio 700 boot flow enters U-Boot SPL after an external DDR loader
> has initialized DRAM. SPL then needs the debug UART and eMMC controller,
> together with their clock, syscon, pinctrl and watchdog providers, to
> load the firmware FIT.
> 
> Signed-off-by: Julien Masson <[email protected]>
> Signed-off-by: Carlo Caione <[email protected]>
> ---
>  arch/arm/dts/mt8188-u-boot.dtsi               | 40 ++++++++++++++++++
>  arch/arm/dts/mt8390-genio-700-evk-u-boot.dtsi | 58 
> +++++++++++++++++++++++++++
>  board/mediatek/MAINTAINERS                    |  2 +
>  3 files changed, 100 insertions(+)
> 
> diff --git a/arch/arm/dts/mt8188-u-boot.dtsi b/arch/arm/dts/mt8188-u-boot.dtsi
> index 6d1b2ab82da..131377d9a97 100644
> --- a/arch/arm/dts/mt8188-u-boot.dtsi
> +++ b/arch/arm/dts/mt8188-u-boot.dtsi
> @@ -8,3 +8,43 @@
>       compatible = "mediatek,mt8188-tphy", "mediatek,generic-tphy-v3",
>                    "mediatek,generic-tphy-v2";
>  };
> +
> +&clk26m {
> +     bootph-pre-ram;
> +};
> +
> +&gic {
> +     bootph-pre-ram;
> +};
> +
> +&topckgen {
> +     bootph-pre-ram;
> +};
> +
> +&infracfg_ao {
> +     bootph-pre-ram;
> +};
> +
> +&pio {
> +     bootph-pre-ram;
> +};
> +
> +&watchdog {
> +     bootph-pre-ram;
> +};
> +
> +&apmixedsys {
> +     bootph-pre-ram;
> +};
> +
> +&uart0 {
> +     bootph-pre-ram;
> +};
> +
> +&pericfg_ao {
> +     bootph-pre-ram;
> +};
> +
> +&mmc0 {
> +     bootph-pre-ram;
> +};
> diff --git a/arch/arm/dts/mt8390-genio-700-evk-u-boot.dtsi 
> b/arch/arm/dts/mt8390-genio-700-evk-u-boot.dtsi
> new file mode 100644
> index 00000000000..ace9944ec41
> --- /dev/null
> +++ b/arch/arm/dts/mt8390-genio-700-evk-u-boot.dtsi
> @@ -0,0 +1,58 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (c) 2024, 2026 Baylibre SAS.
> + * Author: Julien Masson <[email protected]>
> + * Author: Carlo Caione <[email protected]>
> + */
> +
> +#include "mt8188-u-boot.dtsi"
> +
> +/ {
> +     memory@40000000 {
> +             bootph-pre-ram;
> +     };
> +};
> +
> +&mmc0_default_pins {
> +     bootph-pre-ram;
> +
> +     pins-clk {
> +             bootph-pre-ram;
> +     };
> +
> +     pins-cmd-dat {
> +             bootph-pre-ram;
> +     };
> +
> +     pins-rst {
> +             bootph-pre-ram;
> +     };
> +};
> +
> +&mmc0_uhs_pins {
> +     bootph-pre-ram;
> +
> +     pins-clk {
> +             bootph-pre-ram;
> +     };
> +
> +     pins-cmd-dat {
> +             bootph-pre-ram;
> +     };
> +
> +     pins-ds {
> +             bootph-pre-ram;
> +     };
> +
> +     pins-rst {
> +             bootph-pre-ram;
> +     };
> +};
> +
> +&uart0_pins {
> +     bootph-pre-ram;
> +
> +     pins {
> +             bootph-pre-ram;
> +     };
> +};

Is there a plan to change these upstream so that we don't have to carry
this forever?

> diff --git a/board/mediatek/MAINTAINERS b/board/mediatek/MAINTAINERS
> index 37ca35b4dd4..efd38d52338 100644
> --- a/board/mediatek/MAINTAINERS
> +++ b/board/mediatek/MAINTAINERS
> @@ -21,6 +21,8 @@ MT8188/MT8370/MT8390
>  M:   Macpaul Lin <[email protected]>
>  M:   Julien Stephan <[email protected]>
>  S:   Maintained
> +F:   arch/arm/dts/mt8188-u-boot.dtsi
> +F:   arch/arm/dts/mt8390-genio-700-evk-u-boot.dtsi
>  F:   configs/mt8188.config
>  F:   configs/mt8370_genio_510_evk_defconfig
>  F:   configs/mt8390_genio_700_evk_defconfig
> 

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