On 7/21/26 6:22 AM, Carlo Caione wrote: > On Tue Jul 21, 2026 at 2:38 AM CEST, David Lechner wrote: >> On 7/18/26 11:16 AM, Carlo Caione wrote: >
... >>> +``ddr-loader.bin`` >>> + The MediaTek DDR loader for the board. The input may be shorter than >>> + ``0x4b000`` bytes; binman pads it with zeroes to the offset reserved >>> before >>> + SPL. It must have been built with ``SPL_OFFSET=0x4b000``, >> >> Inconsistent formatting. Should be ... >> >> ``SPL`` >> It must ... >> >> ? > > I don't think I follow. The phrase is '... before SPL', SPL is not an > external binary file, it should not be on its own line. Sorry, the `` above threw me off, I thought for a minute that this was starting a new section. Ignore that comment. > >>> + ``SPL_SIZE=CONFIG_SPL_MAX_SIZE`` and an SPL destination and entry >>> address >>> + matching ``CONFIG_SPL_TEXT_BASE``. >>> + >>> +``BL31`` >> >> Why is this BL31 instead of TF-A? > > Because BL31 is compiled (it is) TF-A, they are basically the same > thing. Is this a nomenclature problem? I would either expect that the names (TF-A, OP-TEE, U-Boot) to be used everywhere or BL31, BL32, BL33 to be used everywhere, not a mix of both. However, I see now that these are existing variable names in binman. So obviously can't change them. > >>> + The path to the TF-A BL31 binary built for MT8188/MT8390. It is loaded >>> and >>> + entered at ``0x54601000``. >>> + >>> +``TEE`` >>> + The path to the OP-TEE binary. A standard OP-TEE v1 ``tee.bin`` image is >>> + supported. The FIT loads it at ``0x431fffe4`` and enters it at >>> + ``0x43200000``. >>> + ... > >>> +Using Genio Tools >>> +~~~~~~~~~~~~~~~~~ >> >> Probably deserves an external link on where to get genio-tools and pre-build >> images. > > I'll add a link for the genio-tools. About the pre-build images there is > no place the user can download them from (for now), they are currently > compiled as part of the yocto image / distro. > I was thinking of https://genio.mediatek.com/doc/iot-yocto/latest/sw/yocto/download.html
