On Sun, Jul 12, 2026 at 03:48:16PM +0800, [email protected] wrote: > From: Honbo He <[email protected]> > > Add system reset driver for Espressif Gen3 and Gen4 RISC-V SoCs. > The reset register base address, offset, and bit mask are read > from the device tree to support different chip variants without > code changes. > > Signed-off-by: Honbo He <[email protected]> > --- > drivers/sysreset/Kconfig | 9 ++++ > drivers/sysreset/Makefile | 1 + > drivers/sysreset/sysreset_esp32.c | 72 +++++++++++++++++++++++++++++++ > 3 files changed, 82 insertions(+) > create mode 100644 drivers/sysreset/sysreset_esp32.c
... > diff --git a/drivers/sysreset/sysreset_esp32.c > b/drivers/sysreset/sysreset_esp32.c > new file mode 100644 > index 00000000000..3d4c619f44f > --- /dev/null > +++ b/drivers/sysreset/sysreset_esp32.c > @@ -0,0 +1,72 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2026, Honbo He <[email protected]> > + * > + * System reset driver for Espressif SoCs. > + * > + * Supported SoCs (Gen3/4): > + * ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-H21, ESP32-H4, > + * ESP32-P4, ESP32-S31 > + * > + * On the unsupported chips(Gen1/2), the system reset logic resides inside > the > + * RTC_CNTL peripheral and is only accessible through the boot ROM function > + * software_reset_cpu(). The register definitions are not exposed in the SoC > headers, > + * making it impractical to implement a direct register-based reset > + * in U-Boot without reverse-engineering the ROM code. > + */ > + > +#include <dm.h> > +#include <stdbool.h> But you make no use of bool, so I guess this could be ommitted > +#include <sysreset.h> > +#include <wait_bit.h> Not used, either. > +#include <linux/io.h> > +#include <linux/errno.h> Could you please sort the headers, too? > + > +struct esp32_sysreset_priv { > + void __iomem *base; > + u32 offset; > + u32 mask; > +}; > + > +static int esp32_sysreset_request(struct udevice *dev, enum sysreset_t type) > +{ > + struct esp32_sysreset_priv *priv = dev_get_priv(dev); > + > + setbits_le32(priv->base + priv->offset, priv->mask); And this looks quite compatible with the generic syscon-reboot binding. Why not re-use this driver instead? > + > + return -EINPROGRESS; > +} > + > +static struct sysreset_ops esp32_sysreset = { > + .request = esp32_sysreset_request, > +}; > + > +static int esp32_sysreset_probe(struct udevice *dev) > +{ > + struct esp32_sysreset_priv *priv = dev_get_priv(dev); > + > + priv->base = dev_read_addr_ptr(dev); > + if (!priv->base) > + return -EINVAL; > + > + priv->offset = dev_read_u32_default(dev, "offset", 0); > + priv->mask = dev_read_u32_default(dev, "mask", 0); > + if (priv->mask == 0) > + return -EINVAL; > + > + return 0; > +} > + > +static const struct udevice_id esp32s31_sysreset_ids[] = { > + { .compatible = "esp,esp32-sysreset", }, Is the compatible documented anywhere so we could have a stable dt ABI as reference? I searched current Linux master but got no luck. Best regards, Yao Zi
