The display mutex synchronizes the components of the video pipeline on some MediaTek SoCs, such as the MT8188. Only the modules of the DPI1 pipeline are attached to mutex1; the module bit indices follow the Linux mtk-mutex driver (MT8188_MUTEX_MOD_DISP1_*).
Signed-off-by: Julien Stephan <[email protected]> --- drivers/video/mediatek/mtk_disp_mutex_mt8188.c | 63 ++++++++++++++++++++++++++ drivers/video/mediatek/mtk_disp_mutex_mt8188.h | 14 ++++++ 2 files changed, 77 insertions(+) diff --git a/drivers/video/mediatek/mtk_disp_mutex_mt8188.c b/drivers/video/mediatek/mtk_disp_mutex_mt8188.c new file mode 100644 index 00000000000..f7e52cd25bb --- /dev/null +++ b/drivers/video/mediatek/mtk_disp_mutex_mt8188.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Mediatek Video Disp Mutex Support + * + * Copyright (c) 2025 BayLibre, SAS. + * Author: Julien Stephan <[email protected]> + */ + +#include <dm.h> + +#include "mtk_disp_comp.h" +#include "mtk_disp_mutex_mt8188.h" + +#define DISP_MUTEX1_EN 0x40 +#define DISP_MUTEX1_CTL 0x4c +#define MUTEX_SOF_DPI1 0x5 +#define MUTEX_EOF_DPI1 (0x5 << 7) +#define DISP_MUTEX1_MOD0 0x50 +#define DISP_MUTEX1_MOD1 0x54 + +/* + * Modules attached to mutex1, bit indices as in the Linux mtk-mutex + * driver (MT8188_MUTEX_MOD_DISP1_*). MOD0 holds modules 0-31, MOD1 + * holds modules 32-63. + */ +#define MUTEX_MOD0_MDP_RDMA4 BIT(4) +#define MUTEX_MOD0_MDP_RDMA5 BIT(5) +#define MUTEX_MOD0_PADDING4 BIT(12) +#define MUTEX_MOD0_PADDING5 BIT(13) +#define MUTEX_MOD0_VPP_MERGE2 BIT(22) +#define MUTEX_MOD0_VPP_MERGE4 BIT(24) +#define MUTEX_MOD0_DISP_MIXER BIT(30) +#define MUTEX_MOD1_DPI1 BIT(38 - 32) + +void mtk_disp_mutex_config(struct udevice *dev) +{ + /* the pipeline for the hdmi connection ends with DPI1 -> HDMI */ + mtk_disp_comp_write(dev, DISP_MUTEX1_CTL, + MUTEX_EOF_DPI1 | MUTEX_SOF_DPI1); + + /* attach the modules of the DPI1 pipeline to mutex1 */ + mtk_disp_comp_write(dev, DISP_MUTEX1_MOD0, + MUTEX_MOD0_MDP_RDMA4 | MUTEX_MOD0_MDP_RDMA5 | + MUTEX_MOD0_PADDING4 | MUTEX_MOD0_PADDING5 | + MUTEX_MOD0_VPP_MERGE2 | MUTEX_MOD0_VPP_MERGE4 | + MUTEX_MOD0_DISP_MIXER); + mtk_disp_comp_write(dev, DISP_MUTEX1_MOD1, MUTEX_MOD1_DPI1); + + mtk_disp_comp_write(dev, DISP_MUTEX1_EN, 0x1); +} + +static const struct udevice_id mtk_disp_mutex_ids[] = { + { .compatible = "mediatek,mt8188-disp-mutex" }, + {} +}; + +U_BOOT_DRIVER(mtk_disp_mutex) = { + .name = "mtk_disp_mutex", + .id = UCLASS_MISC, + .of_match = mtk_disp_mutex_ids, + .probe = mtk_disp_comp_probe, + .priv_auto = sizeof(struct mtk_disp_comp_priv), +}; diff --git a/drivers/video/mediatek/mtk_disp_mutex_mt8188.h b/drivers/video/mediatek/mtk_disp_mutex_mt8188.h new file mode 100644 index 00000000000..1739c0e2381 --- /dev/null +++ b/drivers/video/mediatek/mtk_disp_mutex_mt8188.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2025 BayLibre, SAS. + * Author: Julien Stephan <[email protected]> + */ + +#ifndef _MTK_DISP_MUTEX_MT8188_H +#define _MTK_DISP_MUTEX_MT8188_H + +struct udevice; + +void mtk_disp_mutex_config(struct udevice *dev); + +#endif -- 2.54.0
