On 28/07/26 1:43 pm, Moteen Shah wrote:
The J721E SR2.0 silicon revision requires an OTAP delay of 0x8[0] for
eMMC HS200 mode instead of the 0x6 default used by earlier revisions.
Hence, detect the SoC revision at runtime and patch the devicetree
accordingly.
[0] https://www.ti.com/lit/ds/symlink/tda4vm.pdf
Signed-off-by: Moteen Shah <[email protected]>
---
board/ti/j721e/evm.c | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 881392bd963..8e8a5362737 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -16,6 +16,7 @@
#include <asm/gpio.h>
#include <spl.h>
#include <dm.h>
+#include <soc.h>
#include <asm/arch/k3-ddr.h>
#include "../common/board_detect.h"
@@ -33,6 +34,9 @@
/* Max number of MAC addresses that are parsed/processed per daughter card */
#define DAUGHTER_CARD_NO_OF_MAC_ADDR 8
+/* eMMC HS200 mode OTAP delay used by the J721E SR2.0 silicon revision */
+#define EMMC_HS200_OTAP_DEL_SR2 0x8
+
DECLARE_GLOBAL_DATA_PTR;
struct efi_fw_image fw_images[] = {
@@ -125,11 +129,42 @@ static void __maybe_unused detect_enable_hyperflash(void
*blob)
}
#endif
+static void fixup_emmc_hs200_otap_delay(void *blob)
+{
+ struct udevice *soc;
+ char revision[64];
+ u32 otap_delay = cpu_to_fdt32(EMMC_HS200_OTAP_DEL_SR2);
+ int offset;
+ int ret;
+
+ ret = soc_get(&soc);
+ if (ret) {
+ pr_err("WARNING: can't capture SoC details for OTAP
reconfiguration\n");
error or warning. Any one pls.
+ return;
+ }
+
+ ret = soc_get_revision(soc, revision, sizeof(revision));
+ if (ret) {
+ pr_err("WARNING: can't capture SoC revision for OTAP
reconfiguration\n");
+ return;
+ }
+
+ if (strcmp(revision, "SR2.0"))
+ return;
+
+ offset = fdt_node_offset_by_compatible(blob, -1, "ti,j721e-sdhci-8bit");
pls add error check around this.
Regards,
Hari
+ ret = fdt_setprop(blob, offset, "ti,otap-del-sel-hs200", &otap_delay,
+ sizeof(otap_delay));
+ if (ret < 0)
+ pr_err("WARNING: can't reconfigure OTAP delay\n");
+}
+
#if defined(CONFIG_XPL_BUILD) && (defined(CONFIG_TARGET_J7200_A72_EVM) ||
defined(CONFIG_TARGET_J7200_R5_EVM) || \
defined(CONFIG_TARGET_J721E_A72_EVM) ||
defined(CONFIG_TARGET_J721E_R5_EVM))
void spl_perform_board_fixups(struct spl_image_info *spl_image)
{
detect_enable_hyperflash(spl_image->fdt_addr);
+ fixup_emmc_hs200_otap_delay(spl_image->fdt_addr);
}
#endif
@@ -137,6 +172,7 @@ void spl_perform_board_fixups(struct spl_image_info *spl_image)
int ft_board_setup(void *blob, struct bd_info *bd)
{
detect_enable_hyperflash(blob);
+ fixup_emmc_hs200_otap_delay(blob);
return 0;
}