Enable the Genio 510 and Genio 700 SPL path entered by the external DDR loader at 0x40000000. Bind the raw SPL to the loader's 0xaf000-byte copy window, place BSS separately in DRAM, and retain the non-overlapping SPL malloc region.
Use generic SPL MMC, GPT, FIT, and Arm Trusted Firmware support to load the firmware FIT from eMMC partition 1. Keep U-Boot proper at the shared MT8188 CONFIG_TEXT_BASE of 0x4c000000. The MediaTek BL31 used on these boards stalls when passed the runtime devicetree as its platform parameter. Enable SPL_ATF_NO_PLATFORM_PARAM so SPL can still use the tree to locate OP-TEE and U-Boot while passing NULL as the separate BL31 platform parameter. Signed-off-by: Vitor Sato Eschholz <[email protected]> Signed-off-by: Julien Stephan <[email protected]> Signed-off-by: Carlo Caione <[email protected]> --- configs/mt8188.config | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/configs/mt8188.config b/configs/mt8188.config index 29e2b3db878..a84e617e30f 100644 --- a/configs/mt8188.config +++ b/configs/mt8188.config @@ -28,3 +28,30 @@ CONFIG_MTK_SERIAL=y CONFIG_WDT=y CONFIG_WDT_MTK=y # CONFIG_RANDOM_UUID is not set +CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0x40000000 +CONFIG_SPL_MAX_SIZE=0xaf000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400bb800 +CONFIG_SPL_BSS_LIMIT=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x5c000000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x9000000 +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_SPL_SERIAL=y +# CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_SPL_PINCTRL=y +CONFIG_SPL_PINCONF=y +CONFIG_SPL_WATCHDOG=y +CONFIG_SPL_MMC=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_EFI_PARTITION=y +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=1 +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -- 2.55.0
