The Flipper One display bus has no MISO wire. That pin is the end-of-frame GPIO. The device tree says so with spi-rx-bus-width = <0>, but the uclass dropped the value and the Rockchip driver clocked the receive FIFO anyway, discarding every byte. Reported at https://github.com/flipperdevices/u-boot/issues/33 from the boot log there; Alexey has since confirmed the fix on the hardware.
Patch 1 maps bus width 0 to SPI_NO_TX/SPI_NO_RX, validates transfers against the bits in dm_spi_xfer() and adds a sandbox test. Patch 2 has the Rockchip driver pick its transfer mode from those bits, so the unused FIFO stays out of the transfer. Both went out on their own before: https://lore.kernel.org/all/10e92a74c8a22cc2cd54f5dcccc31594016d4263.1787015208.git.munzz...@proton.me/ https://lore.kernel.org/all/69c35eba7ee1a353107459b8f8032e92506a3fb1.1787045568.git.munzz...@proton.me/ Rolled into one series now, since patch 1 has no user by itself. The rk_spi mail had also gone out as a reply into the uclass thread, which is what made b4 read it as a v2 of the prerequisite. Clean thread this time. Sorry for the noise. Changes in v2: - validate NO_RX/NO_TX centrally in dm_spi_xfer() and return -EINVAL, matching Linux __spi_validate(), with a sandbox test for both rejections (suggested by Quentin) - reworded the transfer mode comment in rk_spi.c claim_bus (Quentin) - collected Alexey's Tested-by on patch 2 (Flipper One, warning gone, transmit-only display still works) - added the maintainers get_maintainer.pl lists for the touched files - one series with a cover letter instead of two stray patches Cole Munz (2): spi: Handle spi-{tx,rx}-bus-width 0 as SPI_NO_TX/SPI_NO_RX spi: rockchip: skip the unused FIFO direction on a one-wire device drivers/spi/rk_spi.c | 27 ++++++++++++++++++++++---- drivers/spi/spi-uclass.c | 16 ++++++++++++++++ include/spi.h | 2 ++ test/dm/spi.c | 41 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 82 insertions(+), 4 deletions(-) base-commit: 527115ef6783cec49e5610c523c124b399011361 -- 2.55.0
