The Flipper One display bus has no MISO wire; the pin is the
end-of-frame GPIO. Patch 1 maps spi-{tx,rx}-bus-width = <0> to
SPI_NO_TX/SPI_NO_RX and validates transfers against the bits in
dm_spi_xfer(). Patch 2 has the Rockchip driver pick its transfer mode
from them so the unused FIFO stays out of the transfer. Background and
history are in the v2 cover letter:https://lore.kernel.org/all/[email protected]/ Changes in v3: - dropped the happy path assertion from the new sandbox test, it is already covered by dm_test_spi_xfer (Quentin) - collected Quentin's Acked-by on patch 1 - reworded the toread comment in rk_spi.c to say what the RX drain was actually doing for the transmit path (Quentin) Cole Munz (2): spi: Handle spi-{tx,rx}-bus-width 0 as SPI_NO_TX/SPI_NO_RX spi: rockchip: skip the unused FIFO direction on a one-wire device drivers/spi/rk_spi.c | 29 +++++++++++++++++++++++++---- drivers/spi/spi-uclass.c | 16 ++++++++++++++++ include/spi.h | 2 ++ test/dm/spi.c | 39 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 82 insertions(+), 4 deletions(-) base-commit: 527115ef6783cec49e5610c523c124b399011361 -- 2.55.0
