Add the EcoNet EN7512 reference board: board glue, defconfig, board header and documentation.
Signed-off-by: AK Sharma <[email protected]> --- board/econet/en7512/MAINTAINERS | 8 +++ board/econet/en7512/Makefile | 2 + board/econet/en7512/board.c | 34 +++++++++++ configs/en7512_reference_defconfig | 90 ++++++++++++++++++++++++++++++ doc/board/econet/en7512.rst | 66 ++++++++++++++++++++++ include/configs/en7512.h | 8 +++ 6 files changed, 208 insertions(+) create mode 100644 board/econet/en7512/MAINTAINERS create mode 100644 board/econet/en7512/Makefile create mode 100644 board/econet/en7512/board.c create mode 100644 configs/en7512_reference_defconfig create mode 100644 doc/board/econet/en7512.rst create mode 100644 include/configs/en7512.h diff --git a/board/econet/en7512/MAINTAINERS b/board/econet/en7512/MAINTAINERS new file mode 100644 index 00000000..0c1b931a --- /dev/null +++ b/board/econet/en7512/MAINTAINERS @@ -0,0 +1,8 @@ +ECONET EN7512 REFERENCE BOARD +M: AK Sharma <[email protected]> +S: Maintained +F: arch/mips/dts/econet,en7512* +F: board/econet/en7512/ +F: configs/en7512_reference_defconfig +F: doc/board/econet/en7512.rst +F: include/configs/en7512.h diff --git a/board/econet/en7512/Makefile b/board/econet/en7512/Makefile new file mode 100644 index 00000000..bcca1a9f --- /dev/null +++ b/board/econet/en7512/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0+ +obj-y += board.o diff --git a/board/econet/en7512/board.c b/board/econet/en7512/board.c new file mode 100644 index 00000000..c20597e8 --- /dev/null +++ b/board/econet/en7512/board.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <dm.h> +#include <init.h> +#include <linux/errno.h> +#include <stdio.h> + +extern U_BOOT_DRIVER(airoha_eth); + +int board_init(void) +{ + return 0; +} + +int board_late_init(void) +{ + struct udevice *dev; + int ret; + + if (!IS_ENABLED(CONFIG_AIROHA_ETH)) + return 0; + + /* + * The EN751221 Ethernet parent is intentionally not probed while the + * driver model is being initialized. Probe it after the console is + * usable and just before initr_net() enumerates UCLASS_ETH devices. + */ + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(airoha_eth), &dev); + if (ret && ret != -ENODEV) + printf("EN751221 Ethernet probe failed: %d\n", ret); + + return 0; +} diff --git a/configs/en7512_reference_defconfig b/configs/en7512_reference_defconfig new file mode 100644 index 00000000..988ef7fd --- /dev/null +++ b/configs/en7512_reference_defconfig @@ -0,0 +1,90 @@ +CONFIG_MIPS=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_MALLOC_LEN=0x100000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x1000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="econet,en7512-reference" +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 +CONFIG_SPL_SERIAL=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 +CONFIG_SPL_BSS_START_ADDR=0x80080000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SYS_LOAD_ADDR=0x81800000 +CONFIG_SPL=y +CONFIG_ARCH_EN75XX=y +CONFIG_BUILD_TARGET="u-boot.bin" +CONFIG_SYS_MIPS_TIMER_FREQ=150000000 +CONFIG_MIPS_CACHE_SETUP=y +CONFIG_MIPS_CACHE_DISABLE=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y +CONFIG_MIPS_BOOT_FDT=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTDELAY=3 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DEFAULT_FDT_FILE="en751221_ref" +CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_DISPLAY_CPUINFO=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_TPL=y +# CONFIG_TPL_FRAMEWORK is not set +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_MAXARGS=8 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_BIND=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MTD=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_LOG=y +CONFIG_CMD_UBI=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_UBI=y +CONFIG_ENV_REDUNDANT=y +CONFIG_ENV_UBI_PART="ubi" +CONFIG_ENV_UBI_VOLUME="ubootenv" +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2" +CONFIG_ENV_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=8 +CONFIG_SPL_DM=y +CONFIG_CLK=y +CONFIG_DMA=y +CONFIG_LED=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_SPI_NAND=y +CONFIG_UBI_BLOCK=y +CONFIG_DM_MDIO=y +CONFIG_AIROHA_ETH=y +CONFIG_PHY=y +CONFIG_PINCTRL=y +CONFIG_RAM=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_AIROHA_SNFI_SPI=y +# CONFIG_UBIFS_SILENCE_MSG is not set +# CONFIG_BINMAN_FDT is not set +CONFIG_SHA512=y diff --git a/doc/board/econet/en7512.rst b/doc/board/econet/en7512.rst new file mode 100644 index 00000000..d534ce4f --- /dev/null +++ b/doc/board/econet/en7512.rst @@ -0,0 +1,66 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +EN7512/EN7521 reference board +============================= + +This target provides the initial U-Boot port for the MIPS-based EcoNet/Airoha +EN7512 and EN7521 SoCs. It replaces the proprietary multi-stage TCBoot flow +with U-Boot TPL, SPL and U-Boot proper stages. + +Boot flow +--------- + +The boot ROM starts the TPL from the uncached flash window at ``0xbfc00000``. +The TPL enables the Front-End SRAM, initializes the serial port and reads the +DDR calibration image and SPL through the early SFC reader. After DDR +initialization, SPL loads ``u-boot.img`` into DRAM. + +The generated ``u-boot-en7512.bin`` has the following fixed layout: + +============== ============ =============================== +Offset Maximum size Contents +============== ============ =============================== +``0x00000000`` ``0x8000`` TPL and TCBoot image descriptor +``0x00008000`` ``0x4f70`` Vendor DDR calibration image +``0x0000ff00`` ``0x100`` Board manufacturing information +``0x00010000`` ``0x40000`` Legacy-header SPL image +``0x00050000`` remaining Legacy ``u-boot.img`` +============== ============ =============================== + +The combined image leaves the manufacturing block (offset ``0x0000ff00``) +erased. Before replacing a stock bootloader on a real device, back up and +preserve that block from the original image; it holds board-specific data +such as the MAC address, model and board GPIO values. Do not flash the +combined image over a device whose board data has not been backed up. + +Build +----- + +Use a big-endian MIPS cross compiler:: + + make en7512_reference_defconfig + make CROSS_COMPILE=mips-linux-gnu- + +The flashable combined image is ``u-boot-en7512.bin``. + +Current limitations +------------------- + +* DDR initialization temporarily uses the original vendor calibration image, + linked for execution at ``0x9fa32800``. Its source code was not included in + the SDK and it must eventually be replaced by a native driver. +* The SFC implementation used by TPL and SPL is read-only. U-Boot proper uses + the Airoha EN7523 SPI-MEM driver with the EN751221 double chip-select quirk. + Flash erase/write must not be used until the board's BBT/BMT layout has been + verified. +* Ethernet provides a polling-only U-Boot path through EN751221 QDMA0, GDM1 + and the integrated MT7530. It deliberately preserves switch/PHY reset state + during chainloading. Cold-boot PHY initialization and multi-port control + still need board-specific validation. +* U-Boot proper has been chainloaded and validated on physical hardware. The + complete BootROM -> TPL -> SPL -> U-Boot cold-boot path remains untested. + +TPL reports early failures with one character followed by a newline: +``I`` for SFC initialization, ``F`` for DDR image reading, ``H`` for an +invalid SPL header, ``S`` for SPL loading and ``L`` for a load address that +cannot be reached through KSEG0/KSEG1. diff --git a/include/configs/en7512.h b/include/configs/en7512.h new file mode 100644 index 00000000..93e1c485 --- /dev/null +++ b/include/configs/en7512.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __CONFIG_EN7512_H +#define __CONFIG_EN7512_H + +#define CFG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_INIT_SP_OFFSET 0x00800000 + +#endif -- 2.53.0
