Addresses below 0x911000 must be avoided to work around ERR011166 ("OCRAM:
The first 4K of OCRAM (0x910000 - 0x910fff) is not available during boot
time"). In particular, we have seen boot failures caused by this when
HAB is enabled, but there may be other factors that influence it.As the IVT/DCD header is 4KiB and SPL_TEXT_BASE is 0x912000, this just removes the unused space between header and text and does not reduce the maximum SPL size. The SPL memory layout notes are updated to account for the change, also rewording the text to make it clearer. A similar change (without the doc update) can also be found in the NXP's vendor U-Boot branches. Signed-off-by: Nora Schiffer <[email protected]> --- arch/arm/mach-imx/Kconfig | 3 ++- doc/imx/common/imx7.txt | 40 +++++++++++++++++++++------------------ 2 files changed, 24 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 561f1ee044a..b59d39a5f6d 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -217,8 +217,9 @@ config SPL_IMX_ROMAPI_LOADADDR config IMX_DCD_ADDR hex "DCD Blocks location on the image" - default 0x00910000 if !ARCH_MX7ULP + default 0x00911000 if ARCH_MX7 default 0x2f010000 if ARCH_MX7ULP + default 0x00910000 help Indicates where the Device Configuration Data, a binary table used by the ROM code to configure the device at early boot stage, is located. diff --git a/doc/imx/common/imx7.txt b/doc/imx/common/imx7.txt index b9db10341ad..622df90b3a0 100644 --- a/doc/imx/common/imx7.txt +++ b/doc/imx/common/imx7.txt @@ -2,22 +2,26 @@ U-Boot for Freescale i.MX7 SPL Stack size and location notes --------------------------------- + See figure 6-22 in i.MX 7Dual/Solo Reference manuals: - - IMX7D/S OCRAM free area RAM (OCRAM) is from 0x00910000 to - 0x00946C00. - - Set the stack at the end of the free area section, at 0x00946BB8. - - The BOOT ROM loads what they consider the firmware image - which consists of a 4K header in front of us that contains the IVT, DCD - and some padding. However, the manual also states that the ROM uses the - OCRAM_EPCD and OCRAM_PXP areas for itself. While the SPL is free to use - this range for stack and malloc, the SPL itself must fit below 0x920000, - or the image will be truncated in at least some boot modes like USB SDP. - Thus our max size is really 0x00920000 - 0x00912000. If necessary, - CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space - for the SPL, but 56KB should be more than enough for the SPL. - - Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding) - The extra padding could be removed, but this value was used historically - based on an incorrect CONFIG_SPL_MAX_SIZE definition. - This allows to write the SPL/U-Boot combination generated with - u-boot-with-spl.imx directly to a boot media (given that boot media specific - offset is configured properly). + +The i.MX7D/S free OCRAM area is 0x910000-0x946C00. Some ranges are used by the +Boot ROM while loading the program image however; conflicting with these +addresses will result in image truncation and boot failure in certain boot +modes: + +- OCRAM_EPCD and OCRAM_PXP are reserved according to the reference manual +- 0x910000-0x911000 are unavailable due to erratum ERR011166 + +In consequence, the SPL image (which contains a 4KiB IVT + DCD header) must fit +inside the following ranges: + +- Header: 0x911000-0x912000 (4KiB) +- SPL code: 0x912000-0x920000 (56KiB) + +For historical reasons, 8KiB of extra padding are added between SPL and U-Boot +proper in the combined u-boot-with-spl.imx image, making the U-Boot offset 4KB +header + 56KB max size + 8KB extra padding = 68KiB. + +The full OCRAM can be used at runtime for stack/heap/BSS. The stack is set up to +grow from the end of the free area at 0x946BB8 by default. -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider https://www.tq-group.com/
