On 9/9/26 3:54 PM, Carlo Caione wrote:
> On Wed, Sep 09, 2026 at 14:56:02 +0100, David Lechner wrote:
>> On 9/6/26 10:30 AM, Carlo Caione wrote:
>>> Document the common Genio 510 and Genio 700 eMMC boot chain,
>>> board-specific external firmware prerequisites, binman build invocation
>>> and generated images.
>>>
>>
>> ...
>>
>>> +DDR-loader handoff contract
>>> +---------------------------
>>> +
>>> +The DDR loader and U-Boot SPL have no parameter-block or firmware-call
>>> +interface. Their contract consists of a fixed image layout, initialized 
>>> DRAM
>>> +and the execution state at the SPL entry point. Different DDR-loader
>>> +implementations may be used as long as they satisfy this contract for the
>>> +selected board. The BootROM loads the eMMC boot0 payload to
>>> +``CONFIG_MTK_GENIO_BROM_LOAD_ADDR``::
>>> +
>>> +   offset 0                                     +----------------------+
>>> +                                                | DDR loader           |
>>> +                                                |                      |
>>> +   offset CONFIG_MTK_GENIO_DDR_LOADER_SIZE      +----------------------+
>>> +                                                | U-Boot SPL           |
>>> +                                                | CONFIG_SPL_MAX_SIZE  |
>>> +   image end                                    +----------------------+
>>> +
>>> +The DDR loader then performs the following handoff::
>>> +
>>> +   initialize and train DRAM
>>> +
>>> +   copy:
>>> +     source      = CONFIG_MTK_GENIO_BROM_LOAD_ADDR
>>> +                   + CONFIG_MTK_GENIO_DDR_LOADER_SIZE
>>> +     destination = CONFIG_SPL_TEXT_BASE
>>> +     size        = CONFIG_SPL_MAX_SIZE
>>
>> Do CONFIG_MTK_GENIO_DDR_LOADER_SIZE and CONFIG_SPL_MAX_SIZE need to be the
>> same or just CONFIG_SPL_MAX_SIZE >= CONFIG_MTK_GENIO_DDR_LOADER_SIZE?
> 
> They refer to two different things: CONFIG_MTK_GENIO_DDR_LOADER_SIZE
> reserves space for the DDR loader while CONFIG_MTK_GENIO_DDR_LOADER_SIZE
> is the size of the following SPL region which the loader copies to DRAM.
> 
> --
> Carlo Caione

Ah, makes sense now, the SPL source is appended right after the ddr loader.

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