On 9/8/26 07:17, Siddharth Vadapalli wrote:
Currently, the PCI Controller is programmed in a '1 lane' configuration
unconditionally. As an improvement, fetch the 'num-lanes' property from the
device-tree and use the specified value. Fallback to the existing '1 lane'
configuration in the absence of the 'num-lanes' device-tree property.
Signed-off-by: Siddharth Vadapalli <[email protected]>
---
No changes since v1.
drivers/pci/pcie_dw_ti.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pci/pcie_dw_ti.c b/drivers/pci/pcie_dw_ti.c
index 37c295fdd38..fb39132f7c1 100644
--- a/drivers/pci/pcie_dw_ti.c
+++ b/drivers/pci/pcie_dw_ti.c
@@ -58,6 +58,7 @@ struct pcie_dw_ti {
/* Must be first member of the struct */
struct pcie_dw dw;
void *app_base;
+ u32 num_lanes;
};
enum dw_pcie_device_mode {
@@ -278,6 +279,8 @@ static int pcie_dw_ti_probe(struct udevice *dev)
if (device_is_compatible(dev, "ti,am654-pcie-rc"))
pcie_am654_set_mode(pci, DW_PCIE_RC_TYPE);
+ dw_pcie_link_set_max_link_width(&pci->dw, pci->num_lanes);
+
if (!pcie_dw_ti_pcie_link_up(pci, LINK_SPEED_GEN_2)) {
printf("PCIE-%d: Link down\n", dev_seq(dev));
return -ENODEV;
@@ -332,6 +335,9 @@ static int pcie_dw_ti_of_to_plat(struct udevice *dev)
if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE)
return -EINVAL;
+ /* Get the link-width (number of lanes) */
+ pcie->num_lanes = dev_read_u32_default(dev, "num-lanes", 1);
+
return 0;
}
Reviewed-by: Neil Armstrong <[email protected]>
Thanks,
Neil
