Migrate to OF_UPSTREAM for PCM-058 since board can use upstream Linux kernel device-tree for phyBOARD-Mira-i.MX6Q.
Signed-off-by: Primoz Fiser <[email protected]> --- arch/arm/dts/Makefile | 1 - arch/arm/dts/imx6q-phytec-mira-rdk-nand.dts | 75 ---- .../dts/imx6qdl-phytec-mira-peb-av-02.dtsi | 119 ----- .../dts/imx6qdl-phytec-mira-peb-eval-01.dtsi | 71 --- .../dts/imx6qdl-phytec-mira-peb-wlbt-05.dtsi | 85 ---- arch/arm/dts/imx6qdl-phytec-mira.dtsi | 412 ------------------ arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 311 ------------- arch/arm/mach-imx/mx6/Kconfig | 1 + configs/pcm058_defconfig | 2 +- 9 files changed, 2 insertions(+), 1075 deletions(-) delete mode 100644 arch/arm/dts/imx6q-phytec-mira-rdk-nand.dts delete mode 100644 arch/arm/dts/imx6qdl-phytec-mira-peb-av-02.dtsi delete mode 100644 arch/arm/dts/imx6qdl-phytec-mira-peb-eval-01.dtsi delete mode 100644 arch/arm/dts/imx6qdl-phytec-mira-peb-wlbt-05.dtsi delete mode 100644 arch/arm/dts/imx6qdl-phytec-mira.dtsi delete mode 100644 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2b65cd9105c5..63af8d26b289 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -777,7 +777,6 @@ dtb-y += \ imx6q-nitrogen6x.dtb \ imx6q-novena.dtb \ imx6q-pico.dtb \ - imx6q-phytec-mira-rdk-nand.dtb \ imx6q-udoo.dtb \ imx6q-sabreauto.dtb \ imx6q-sabrelite.dtb \ diff --git a/arch/arm/dts/imx6q-phytec-mira-rdk-nand.dts b/arch/arm/dts/imx6q-phytec-mira-rdk-nand.dts deleted file mode 100644 index 3f13726c8058..000000000000 --- a/arch/arm/dts/imx6q-phytec-mira-rdk-nand.dts +++ /dev/null @@ -1,75 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2018 PHYTEC Messtechnik GmbH - * Author: Christian Hemp <[email protected]> - */ - -/dts-v1/; -#include "imx6q.dtsi" -#include "imx6qdl-phytec-phycore-som.dtsi" -#include "imx6qdl-phytec-mira.dtsi" -#include "imx6qdl-phytec-mira-peb-eval-01.dtsi" -#include "imx6qdl-phytec-mira-peb-av-02.dtsi" -#include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi" - -/ { - model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with NAND"; - compatible = "phytec,imx6q-pbac06-nand", "phytec,imx6q-pbac06", - "phytec,imx6qdl-pcm058", "fsl,imx6q"; - - chosen { - stdout-path = &uart2; - }; -}; - -&can1 { - status = "okay"; -}; - -&fec { - status = "okay"; -}; - -&gpmi { - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c_rtc { - status = "okay"; -}; - -&m25p80 { - status = "okay"; -}; - -&pcie { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usbh1 { - status = "okay"; -}; - -&usbotg { - status = "okay"; -}; - -&usdhc1 { - status = "okay"; -}; diff --git a/arch/arm/dts/imx6qdl-phytec-mira-peb-av-02.dtsi b/arch/arm/dts/imx6qdl-phytec-mira-peb-av-02.dtsi deleted file mode 100644 index 0020dbb1722c..000000000000 --- a/arch/arm/dts/imx6qdl-phytec-mira-peb-av-02.dtsi +++ /dev/null @@ -1,119 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2018 PHYTEC Messtechnik - * Author: Christian Hemp <[email protected]> - */ - -/ { - display: display0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx-parallel-display"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_disp0>; - interface-pix-fmt = "rgb24"; - status = "disabled"; - - port@0 { - reg = <0>; - - display0_in: endpoint { - remote-endpoint = <&ipu1_di0_disp0>; - }; - }; - - port@1 { - reg = <1>; - - display0_out: endpoint { - remote-endpoint = <&peb_panel_lcd_in>; - }; - }; - }; - - panel-lcd { - compatible = "edt,etm0700g0edh6"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_disp0_pwr>; - power-supply = <®_display>; - enable-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; - backlight = <&backlight>; - status = "disabled"; - - port { - peb_panel_lcd_in: endpoint { - remote-endpoint = <&display0_out>; - }; - }; - }; - - reg_display: regulator-peb-display { - compatible = "regulator-fixed"; - regulator-name = "peb-display"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; - -&i2c1 { - edt_ft5x06: touchscreen@38 { - compatible = "edt,edt-ft5406"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_edt_ft5x06>; - reg = <0x38>; - interrupt-parent = <&gpio3>; - interrupts = <2 IRQ_TYPE_NONE>; - status = "disabled"; - }; -}; - -&ipu1_di0_disp0 { - remote-endpoint = <&display0_in>; -}; - -&iomuxc { - pinctrl_disp0: disp0grp { - fsl,pins = < - MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 - MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 - MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 - MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x1b080 - MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 - MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 - MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 - MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 - MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 - MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 - MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 - MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 - MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 - MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 - MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 - MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 - MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 - MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 - MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 - MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 - MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 - MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 - MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 - MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 - MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 - MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 - MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 - MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 - >; - }; - - pinctrl_disp0_pwr: disp0pwrgrp { - fsl,pins = < - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 - >; - }; - - pinctrl_edt_ft5x06: edtft5x06grp { - fsl,pins = < - MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0xb0b1 - >; - }; -}; diff --git a/arch/arm/dts/imx6qdl-phytec-mira-peb-eval-01.dtsi b/arch/arm/dts/imx6qdl-phytec-mira-peb-eval-01.dtsi deleted file mode 100644 index 037b60197598..000000000000 --- a/arch/arm/dts/imx6qdl-phytec-mira-peb-eval-01.dtsi +++ /dev/null @@ -1,71 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2018 PHYTEC Messtechnik - * Author: Christian Hemp <[email protected]> - */ - -#include <dt-bindings/input/input.h> - -/ { - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_keys>; - status = "disabled"; - - power { - label = "Power Button"; - gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; - linux,code = <KEY_WAKEUP>; - wakeup-source; - }; - - sleep { - label = "Sleep Button"; - gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; - linux,code = <KEY_SLEEP>; - }; - }; - - user_leds: user-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_user_leds>; - status = "disabled"; - - user-led1 { - gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "gpio"; - default-state = "on"; - }; - - user-led2 { - gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "gpio"; - default-state = "on"; - }; - - user-led3 { - gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "gpio"; - default-state = "on"; - }; - }; -}; - -&iomuxc { - pinctrl_gpio_keys: gpiokeysgrp { - fsl,pins = < - MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0 - MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x1b0b0 - >; - }; - - pinctrl_user_leds: userledsgrp { - fsl,pins = < - MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 - MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 - MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0 - >; - }; -}; diff --git a/arch/arm/dts/imx6qdl-phytec-mira-peb-wlbt-05.dtsi b/arch/arm/dts/imx6qdl-phytec-mira-peb-wlbt-05.dtsi deleted file mode 100644 index 84f884d6e55b..000000000000 --- a/arch/arm/dts/imx6qdl-phytec-mira-peb-wlbt-05.dtsi +++ /dev/null @@ -1,85 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2021 PHYTEC Messtechnik GmbH - * Author: Yunus Bas <[email protected]> - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - reg_wl_en: regulator-wl-en { - compatible = "regulator-fixed"; - regulator-name = "wlan_en"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wl>; - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - startup-delay-us = <100>; - status = "disabled"; - }; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3_bt>; - uart-has-rtscts; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - shutdown-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; - device-wakeup-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; -}; - -&usdhc3 { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3_wl>; - vmmc-supply = <®_wl_en>; - bus-width = <4>; - non-removable; - no-1-8-v; - status = "disabled"; - - brmcf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - }; -}; - -&iomuxc { - pinctrl_uart3_bt: uart3grp-bt { - fsl,pins = < - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 - MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 - MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0xb0b1 /* BT ENABLE */ - MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0xb0b1 /* DEV WAKEUP */ - MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0xb0b1 /* HOST WAKEUP */ - >; - }; - - pinctrl_usdhc3_wl: usdhc3grp-wl { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - >; - }; - - pinctrl_wl: wlgrp { - fsl,pins = < - MX6QDL_PAD_EIM_A25__GPIO5_IO02 0xb0b1 /* WLAN ENABLE */ - >; - }; -}; diff --git a/arch/arm/dts/imx6qdl-phytec-mira.dtsi b/arch/arm/dts/imx6qdl-phytec-mira.dtsi deleted file mode 100644 index 120d6e997a4c..000000000000 --- a/arch/arm/dts/imx6qdl-phytec-mira.dtsi +++ /dev/null @@ -1,412 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2018 PHYTEC Messtechnik GmbH - * Author: Christian Hemp <[email protected]> - */ - - -/ { - aliases { - rtc0 = &i2c_rtc; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <7>; - power-supply = <®_backlight>; - pwms = <&pwm1 0 5000000>; - status = "okay"; - }; - - gpio_leds: leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpioleds>; - status = "disabled"; - - red { - label = "phyboard-mira:red"; - gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; - }; - - green { - label = "phyboard-mira:green"; - gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; - }; - - blue { - label = "phyboard-mira:blue"; - gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - }; - }; - - reg_backlight: regulator-backlight { - compatible = "regulator-fixed"; - regulator-name = "backlight_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_en_switch: regulator-en-switch { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_en_switch>; - regulator-name = "Enable Switch"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio3 4 GPIO_ACTIVE_HIGH>; - regulator-always-on; - }; - - reg_flexcan1: regulator-flexcan1 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1_en>; - regulator-name = "flexcan1-reg"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_panel: regulator-panel { - compatible = "regulator-fixed"; - regulator-name = "panel-power-supply"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - }; - - reg_pcie: regulator-pcie { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie_reg>; - regulator-name = "mPCIe_1V5"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - gpio = <&gpio3 0 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_usb_h1_vbus: usb-h1-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1_vbus>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_usbotg_vbus: usbotg-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_vbus>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - panel { - compatible = "auo,g104sn02"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_panel_en>; - power-supply = <®_panel>; - enable-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; - backlight = <&backlight>; - - port { - panel_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; - }; -}; - -&can1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1>; - xceiver-supply = <®_flexcan1>; - status = "disabled"; -}; - -&hdmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hdmicec>; - ddc-i2c-bus = <&i2c2>; - status = "disabled"; -}; - -&i2c1 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c1>; - pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - clock-frequency = <400000>; - status = "disabled"; - - stmpe: touchctrl@44 { - compatible = "st,stmpe811"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_stmpe>; - reg = <0x44>; - interrupt-parent = <&gpio7>; - interrupts = <12 IRQ_TYPE_NONE>; - status = "disabled"; - - stmpe_touchscreen { - compatible = "st,stmpe-ts"; - st,sample-time = <4>; - st,mod-12b = <1>; - st,ref-sel = <0>; - st,adc-freq = <1>; - st,ave-ctrl = <1>; - st,touch-det-delay = <2>; - st,settling = <2>; - st,fraction-z = <7>; - st,i-drive = <1>; - }; - }; - - i2c_rtc: rtc@68 { - compatible = "microcrystal,rv4162"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rtc_int>; - reg = <0x68>; - interrupt-parent = <&gpio7>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; -}; - -&i2c2 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c2>; - pinctrl-1 = <&pinctrl_i2c2_gpio>; - scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - clock-frequency = <100000>; - status = "disabled"; -}; - -&ldb { - status = "okay"; - - lvds-channel@0 { - fsl,data-mapping = "spwg"; - fsl,data-width = <24>; - status = "disabled"; - - port@4 { - reg = <4>; - - lvds0_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; - }; -}; - -&pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio2 25 GPIO_ACTIVE_LOW>; - vpcie-supply = <®_pcie>; - status = "disabled"; -}; - -&pwm1 { - #pwm-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm1>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - uart-has-rtscts; - status = "disabled"; -}; - -&usbh1 { - vbus-supply = <®_usb_h1_vbus>; - disable-over-current; - status = "disabled"; -}; - -&usbotg { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg>; - vbus-supply = <®_usbotg_vbus>; - disable-over-current; - status = "disabled"; -}; - -&usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1>; - cd-gpios = <&gpio6 31 GPIO_ACTIVE_LOW>; - no-1-8-v; - disable-wp; - status = "disabled"; -}; - -&iomuxc { - pinctrl_panel_en: panelen1grp { - fsl,pins = < - MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0xb0b1 - >; - }; - - pinctrl_en_switch: enswitchgrp { - fsl,pins = < - MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0xb0b1 - >; - }; - - pinctrl_flexcan1: flexcan1grp { - fsl,pins = < - MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 - MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 - >; - }; - - pinctrl_flexcan1_en: flexcan1engrp { - fsl,pins = < - MX6QDL_PAD_EIM_A18__GPIO2_IO20 0xb0b1 - >; - }; - - pinctrl_gpioleds: gpioledsgrp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0 - MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0 - MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24 0x1b0b0 - >; - }; - - pinctrl_hdmicec: hdmicecgrp { - fsl,pins = < - MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 - >; - }; - - pinctrl_i2c1_gpio: i2c1gpiogrp { - fsl,pins = < - MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1 - MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1 - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 - >; - }; - - pinctrl_i2c2_gpio: i2c2gpiogrp { - fsl,pins = < - MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1 - MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1 - >; - }; - - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_EIM_OE__GPIO2_IO25 0xb0b1 - >; - }; - - pinctrl_pcie_reg: pciereggrp { - fsl,pins = < - MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0xb0b1 - >; - }; - - pinctrl_pwm1: pwm1grp { - fsl,pins = < - MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 - >; - }; - - pinctrl_rtc_int: rtcintgrp { - fsl,pins = < - MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0 - >; - }; - - pinctrl_stmpe: stmpegrp { - fsl,pins = < - MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX6QDL_PAD_EIM_EB3__UART3_CTS_B 0x1b0b1 - MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x1b0b1 - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_usbh1_vbus: usbh1vbusgrp { - fsl,pins = < - MX6QDL_PAD_EIM_A20__GPIO2_IO18 0xb0b1 - >; - }; - - pinctrl_usbotg: usbotggrp { - fsl,pins = < - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 - >; - }; - - pinctrl_usbotg_vbus: usbotgvbusgrp { - fsl,pins = < - MX6QDL_PAD_EIM_A19__GPIO2_IO19 0xb0b1 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9 - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9 - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 - MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb0b1 /* CD */ - >; - }; -}; diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi deleted file mode 100644 index 28a805384668..000000000000 --- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi +++ /dev/null @@ -1,311 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2018 PHYTEC Messtechnik GmbH - * Author: Christian Hemp <[email protected]> - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/regulator/dlg,da9063-regulator.h> - -/ { - aliases { - rtc1 = &da9062_rtc; - rtc2 = &snvs_rtc; - }; - - /* - * Set the minimum memory size here and - * let the bootloader set the real size. - */ - memory@10000000 { - device_type = "memory"; - reg = <0x10000000 0x8000000>; - }; - - gpio_leds_som: somleds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpioleds_som>; - - som-led-green { - label = "phycore:green"; - gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; -}; - -&ecspi1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1>; - cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; - status = "okay"; - - m25p80: flash@0 { - compatible = "jedec,spi-nor"; - spi-max-frequency = <20000000>; - reg = <0>; - status = "disabled"; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-handle = <ðphy>; - phy-mode = "rgmii"; - phy-supply = <&vdd_eth_io>; - phy-reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; - status = "disabled"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy: ethernet-phy@3 { - reg = <3>; - txc-skew-ps = <1680>; - rxc-skew-ps = <1860>; - }; - }; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - nand-on-flash-bbt; - status = "disabled"; -}; - -&i2c3 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c3>; - pinctrl-1 = <&pinctrl_i2c3_gpio>; - scl-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - clock-frequency = <400000>; - status = "okay"; - - eeprom@50 { - compatible = "st,24c32", "atmel,24c32"; - pagesize = <32>; - reg = <0x50>; - }; - - pmic: pmic@58 { - compatible = "dlg,da9062"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pmic>; - reg = <0x58>; - interrupt-parent = <&gpio1>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - gpio-controller; - #gpio-cells = <2>; - - da9062_rtc: rtc { - compatible = "dlg,da9062-rtc"; - }; - - da9062_onkey: onkey { - compatible = "dlg,da9062-onkey"; - }; - - watchdog { - compatible = "dlg,da9062-watchdog"; - dlg,use-sw-pm; - }; - - thermal { - compatible = "dlg,da9062-thermal"; - status = "disabled"; - }; - - gpio { - compatible = "dlg,da9062-gpio"; - status = "disabled"; - }; - - regulators { - vdd_arm: buck1 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <925000>; - regulator-max-microvolt = <1380000>; - regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>; - regulator-always-on; - }; - - vdd_soc: buck2 { - regulator-name = "vdd_soc"; - regulator-min-microvolt = <1150000>; - regulator-max-microvolt = <1380000>; - regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>; - regulator-always-on; - }; - - vdd_ddr3_1p5: buck3 { - regulator-name = "vdd_ddr3"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>; - regulator-always-on; - }; - - vdd_eth_1p2: buck4 { - regulator-name = "vdd_eth"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>; - regulator-always-on; - }; - - vdd_snvs: ldo1 { - regulator-name = "vdd_snvs"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - vdd_high: ldo2 { - regulator-name = "vdd_high"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - vdd_eth_io: ldo3 { - regulator-name = "vdd_eth_io"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - }; - - vdd_emmc_1p8: ldo4 { - regulator-name = "vdd_emmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - }; - }; -}; - -®_arm { - vin-supply = <&vdd_arm>; -}; - -®_pu { - vin-supply = <&vdd_soc>; -}; - -®_soc { - vin-supply = <&vdd_soc>; -}; - -&snvs_poweroff { - status = "okay"; -}; - -&usdhc4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc4>; - bus-width = <8>; - non-removable; - status = "disabled"; -}; - -&iomuxc { - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 - MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 - MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 - >; - }; - - pinctrl_gpioleds_som: gpioledssomgrp { - fsl,pins = < - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 - >; - }; - - pinctrl_gpmi_nand: gpminandgrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 - MX6QDL_PAD_NANDF_CS2__NAND_CE2_B 0xb0b1 - MX6QDL_PAD_NANDF_CS3__NAND_CE3_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 - >; - }; - - pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 - MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 - >; - }; - - pinctrl_i2c3_gpio: i2c3gpiogrp { - fsl,pins = < - MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1 - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b8b1 - >; - }; - - pinctrl_ecspi1: ecspi1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 - MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 - MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 - MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 - >; - }; - - pinctrl_pmic: pmicgrp { - fsl,pins = < - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 - >; - }; - - pinctrl_usdhc4: usdhc4grp { - fsl,pins = < - MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 - MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 - MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 - MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 - MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 - MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 - MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 - MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 - MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 - MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 - >; - }; -}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d198d9932f45..14807379336a 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -560,6 +560,7 @@ config TARGET_PCM058 select DM select OF_CONTROL imply CMD_DM + imply OF_UPSTREAM config TARGET_PCL063 bool "PHYTEC PCL063 (phyCORE-i.MX6UL)" diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 3be4dc3a1d98..6bacbea604e4 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -14,7 +14,7 @@ CONFIG_MX6_OCRAM_256KB=y CONFIG_TARGET_PCM058=y CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-phytec-mira-rdk-nand" +CONFIG_DEFAULT_DEVICE_TREE="nxp/imx/imx6q-phytec-mira-rdk-nand" CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y -- 2.34.1
