Hi Mike,

you are sending email to
[email protected]

but you should be sending it here.
[email protected]

On 9/15/26 10:02, Mike Looijmans wrote:
When the Zynq boots from QSPI NOR flash, the ROM will have set up the
QSPI NOR in linear mode, and the contents are now memory mapped (the first
16MB/32MB at least). All that needs to be done at this stage is to memcpy
the u-boot code into DDR RAM. This is not only extremely simple, it's also
the fastest method to read QSPI flash on this platform.
This corresponds to a standard NOR boot, hence this mode is selected as
SPL_NOR_SUPPORT.

Add a menu choice to select which method to use.

To boot from QSPI NOR, write "boot.bin" to offset 0 and write "u-boot.img"
to offset CONFIG_SPL_PAD_TO in the flash. Usually CONFIG_SPL_PAD_TO will
be 0x20000 as the SPL code easily fits in 128k. The offset must fit in the
accessible range for linear mode, which is 16MB for single and 32MB for
the dual chip modes.


Also say that this limit is not checked yet.

Tested on topic_miami boards.

Signed-off-by: Mike Looijmans <[email protected]>
---

Changes in v3:
Make the QSPI NOR mode a menu choice as suggested by Michal Simek
Obtain payload offset from device-tree config in spl_nor_get_uboot_base()

Changes in v2:
Reworded and amended commit text
Add #define for magic QSPI linear mode address
Use old method by default, use SPL_NOR_SUPPORT to switch to mmap

  arch/arm/Kconfig              |  4 ----
  arch/arm/mach-zynq/Kconfig    | 34 ++++++++++++++++++++++++++++++----
  arch/arm/mach-zynq/spl.c      | 22 +++++++++++++++++++++-
  include/configs/zynq-common.h |  3 +++
  4 files changed, 54 insertions(+), 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 514bf2000b4..fa965125e80 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1346,8 +1346,6 @@ config ARCH_ZYNQ
        select SPL_SOC_INIT if SPL
        select SPL_CLK if SPL
        select SPL_DM if SPL
-       select SPL_DM_SPI if SPL
-       select SPL_DM_SPI_FLASH if SPL
        select SPL_OF_CONTROL if SPL
        select SPL_SEPARATE_BSS if SPL
        select SPL_TIMER if SPL
@@ -1398,8 +1396,6 @@ config ARCH_ZYNQMP
        imply SPL_LIBGENERIC_SUPPORT if SPL
        imply SPL_MMC if SPL && MMC_SDHCI_ZYNQ
        imply SPL_SERIAL if SPL
-       imply SPL_SPI if SPL && ZYNQ_QSPI
-       imply SPL_SPI_FLASH_SUPPORT if SPL && ZYNQ_QSPI

Did you test it on ZynqMP too?

        select SPL_SEPARATE_BSS if SPL
        select SUPPORT_SPL
        imply ZYNQMP_IPI if DM_MAILBOX
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index c3f505fa15c..6167f5e51b4 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -18,11 +18,37 @@ config SPL_MMC
  config SPL_SERIAL
        default y
-config SPL_SPI_FLASH_SUPPORT
-       default y if ZYNQ_QSPI
+choice
+       prompt "SPL QSPI boot access method"
+       depends on SPL && ZYNQ_QSPI


Likely not.

+       default ZYNQ_SPL_QSPI_DM_SPI
+       help
+         Select how to load u-boot.img (U-Boot proper) into memory from the SPL
+         loader when QSPI is the boot device.
+
+config ZYNQ_SPL_QSPI_DM_SPI
+       bool "DM SPI-NOR framework"
+       select SPL_DM_SPI
+       select SPL_DM_SPI_FLASH
+       select SPL_SPI
+       select SPL_SPI_FLASH_SUPPORT
+       help
+         Use the SPI-NOR drivers to transfer U-Boot proper into main memory
+         from the QSPI flash.
+
+config ZYNQ_SPL_QSPI_MMAP
+       bool "Memory-mapped linear (NOR) mode"
+       select SPL_NOR_SUPPORT
+       help
+         When the Zynq boots from QSPI NOR flash, the ROM will have set up the
+         QSPI NOR in linear mode. This option just uses memcpy to transfer
+         U-Boot proper into main memory. This reduces the SPL size by about 12k
+         and is the fastest boot method. For this to work, u-boot.img must be
+         within the first 16MB at offset CONFIG_SPL_PAD_TO, or config value
+         "u-boot,spl-payload-offset" in the device-tree.
+
+endchoice
-config SPL_SPI
-       default y if ZYNQ_QSPI
config ZYNQ_DDRC_INIT
        bool "Zynq DDRC initialization"
diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c
index dc964dc2f9f..534374078cb 100644
--- a/arch/arm/mach-zynq/spl.c
+++ b/arch/arm/mach-zynq/spl.c
@@ -15,6 +15,8 @@
  #include <asm/arch/sys_proto.h>
  #include <asm/arch/ps7_init_gpl.h>
+#include <dm/ofnode.h>
+
  #if defined(CONFIG_DEBUG_UART_BOARD_INIT)
  void board_debug_uart_init(void)
  {
@@ -42,12 +44,30 @@ void spl_soc_init(void)
  }
  #endif
+#ifdef CONFIG_SPL_NOR_SUPPORT
+unsigned long spl_nor_get_uboot_base(void)
+{
+       int payload_offs = CONFIG_SPL_PAD_TO;
+
+       if (CONFIG_IS_ENABLED(OF_REAL)) {
+               payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset",
+                                                   payload_offs);

doc/device-tree-bindings/config.txt

u-boot,spl-payload-offset (int)
        If present (and SPL is controlled by the device-tree), this allows
        to override the CONFIG_SYS_SPI_U_BOOT_OFFS setting using a value
        from the device-tree.

you need to update it's description because this if for NOR not for SPI.


+       }
+
+       return ZYNQ_QSPI0_LINEAR_ADDR + payload_offs;
+}
+#endif
+
  u32 spl_boot_device(void)
  {
        u32 mode;
switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
-#ifdef CONFIG_SPL_SPI
+#ifdef CONFIG_SPL_NOR_SUPPORT
+       case ZYNQ_BM_QSPI:
+               mode = BOOT_DEVICE_NOR;
+               break;
+#elif CONFIG_SPL_SPI

I think you should do

#if CONFIG_SPL_SPI

#elif CONFIG_SPL_NOR_SUPPORT

It will be clear that you need to disable SPL_SPI to get to NOR support.
Also diff will have one line less.

        case ZYNQ_BM_QSPI:
                mode = BOOT_DEVICE_SPI;
                break;
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 94273d0deb9..4e14c74e31f 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -35,6 +35,9 @@
  /* Ethernet driver */
/* NOR */
+/* Load address is mmap address of QSPI flash, plus the offset */
+#define ZYNQ_QSPI0_LINEAR_ADDR 0xfc000000
+#define CFG_SYS_UBOOT_BASE     (ZYNQ_QSPI0_LINEAR_ADDR + CONFIG_SPL_PAD_TO)

did you test also XIP? If not, please add a note to commit message that XIP is not tested because this macro is used for XIP too.

Thanks,
Michal

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