The pmbus it not for MPQ only, clean the comments. No functional change.
Signed-off-by: Vincent Jardin <[email protected]> --- doc/develop/pmbus.rst | 40 +------------------------- drivers/power/regulator/pmbus_helper.h | 5 ++-- include/pmbus.h | 30 ++----------------- lib/pmbus.c | 10 +++---- 4 files changed, 10 insertions(+), 75 deletions(-) diff --git a/doc/develop/pmbus.rst b/doc/develop/pmbus.rst index efc9f9a95e5..7ff1d4611b2 100644 --- a/doc/develop/pmbus.rst +++ b/doc/develop/pmbus.rst @@ -562,7 +562,7 @@ Decision tree: non default coefficients), an alert can't be decoded (chip has vendor specific status bits), AVS is needed (the boot path has to actively trim VOUT before kernel handoff), or the chip has an - ADDR-pin auto promotion / VID coercion / vendor register quirk. + address scan / VID coercion / vendor register quirk. DT alignment with Linux ----------------------- @@ -588,44 +588,6 @@ declare each rail as a child regulator node with ``reg = <page>``; each child binds as a UCLASS_REGULATOR with that PMBus PAGE setting applied at every read/write. -Common pitfalls ---------------- - -These have all bitten contributors during nbxv3 bring up; record them -here so the next port doesn't repeat them. - -* VOUT_MODE/DIRECT format confusion. Most generic PMBus call - sites assume LINEAR16. Several MPS chips report VOUT in DIRECT - format with chip specific m/b/R after a single VOUT_MODE read, - the same chip read at the same address produces different - numbers depending on the format the driver applies. Always read - ``VOUT_MODE`` at probe time and switch the decoder accordingly. - Linux's per chip ``identify()`` callbacks document the exact - rules; copy them rather than guessing. -* SMBus block read protocol. Some I2C controllers strict check - block read transactions: the master must read the length byte - first, then reissue the read for the payload. Over reading a - fixed length and ignoring the length byte works on lenient - controllers but errors on strict ones. ``pmbus_read_string()`` - does the two stage read; use it. -* I2C bus number stability. ``uclass_get_device_by_seq()`` - uses the DT alias index (``i2c0`` -> ``UCLASS_I2C`` seq 0) when - aliases are declared, otherwise falls back to probe order which - varies with which controllers are enabled in the defconfig. - Always declare DT aliases for I2C buses you reference by index. -* ADDR-pin auto addressessing. Some chips (notably MPS parts) decode - their PMBus 7-bit address from an external resistor divider on - ADDR_VBOOT. The "default" address in the datasheet is the - factory fused slot; a board with a different divider or a die - with a different revision can land in another window. If the - driver hardcodes the default and the board side scan finds the - chip in another window, auto promote the working address rather - than failing the probe. -* MFR string byte order. Most PMBus chips return ``MFR_ID`` - characters in human order. Some MPS personalities reverse them. - Pass ``reverse_bytes=true`` to ``pmbus_read_string()`` for those; - spec compliant chips pass false. - References ---------- diff --git a/drivers/power/regulator/pmbus_helper.h b/drivers/power/regulator/pmbus_helper.h index 82f263cd513..f82b782781e 100644 --- a/drivers/power/regulator/pmbus_helper.h +++ b/drivers/power/regulator/pmbus_helper.h @@ -11,9 +11,8 @@ * via the tree level <pmbus.h> framework. * * Per chip drivers retain control of identify hooks (VOUT_MODE based - * format selection), chip specific quirks (vendor registers, ADDR pin - * auto promotion), and DT property handling (e.g. MPS - * mps,vout-fb-divider-ratio-permille). + * format selection), chip specific quirks (vendor registers, + * address scans), and DT property handling. */ #ifndef _DRIVERS_POWER_REGULATOR_PMBUS_HELPER_H_ diff --git a/include/pmbus.h b/include/pmbus.h index 0e121fa6637..bb85a61e62a 100644 --- a/include/pmbus.h +++ b/include/pmbus.h @@ -288,12 +288,7 @@ struct pmbus_driver_info { * Bitmask (BIT(enum pmbus_sensor_classes)) of the sensor classes * this chip actually implements. When non-zero, pmbus_print_telemetry * prints exactly these classes -- mirroring the kernel's per chip - * sensor set -- and skips the rest. This is how an MPS buck that - * ACKs READ_POUT / READ_IIN with an uncalibrated value still hides - * POWER / CURRENT_IN (the kernel's mpq8646 driver exposes neither). - * Zero means "not declared": the telemetry printer falls back to a - * live pmbus_word_command_supported() probe per class, which is what - * the generic driver (compatible = "pmbus") relies on. + * sensor set -- and skips the rest. */ u8 classes_present; }; @@ -311,11 +306,6 @@ struct pmbus_driver_info { /* * LINEAR11. Bits[15:11] = signed 5 bit exponent Y, bits[10:0] = * signed 11 bit mantissa N. Engineering value = N * 2^Y. - * - * Used by most PMBus chips for VIN, IIN, IOUT, TEMP. Some MPS - * parts deviate (they report DIRECT format with chip specific m/b/R - * coefficients); check the chip datasheet against PMBUS_VOUT_MODE - * and the Linux per chip driver if porting. */ s64 pmbus_reg2data_linear11(u16 raw); @@ -416,10 +406,6 @@ int pmbus_write_word(struct udevice *dev, u8 cmd, u16 val); * work. Output is null terminated and printable only (non printable * bytes are substituted with '.'). * - * reverse_bytes: some MPS NVM personalities store ASCII strings - * LSB first (chip returns "SPM" for the human string "MPS"); pass - * true to reverse on copy. Spec compliant chips pass false. - * * Returns string length on success or a negative errno on bus error * or invalid length byte. outsz must be at least 2. */ @@ -469,10 +455,7 @@ void pmbus_print_status_word(struct udevice *chip); * * Read READ_TEMPERATURE_1 (8Dh) from a UCLASS_REGULATOR device that * was bound by a pmbus_helper based chip driver, decode it through - * the chip's pmbus_driver_info (so the MPS DIRECT 1 degC/LSB quirk - * and the standard LINEAR11 encoding are both handled), select the - * regulator's PAGE first on multi rail parts, and return the result - * in millidegrees Celsius. + * the chip's pmbus_driver_info. * * This is what the generic drivers/thermal/pmbus_thermal.c companion * calls on its parent; keeping the decode here avoids exposing the @@ -610,11 +593,6 @@ void pmbus_clear_active(void); * framework can associate an MFR_ID prefix (read at probe time) * with a vendor namespace ("mps", "lltc", "renesas", ...) and a * pmbus_driver_info pointer. The first matching entry wins. - * - * mfr_id_reverse flags MPS style chips that store the MFR_ID - * string LSB first (chip returns "SPM" for the human string - * "MPS"); the framework reads the string in both orderings and - * matches against the prefix in the natural reading. */ struct pmbus_chip_match { const char *mfr_id; @@ -646,9 +624,7 @@ int pmbus_resolve_by_name(const char *name, int *bus_seq, u8 *addr); * pmbus_active(), or returns CMD_RET_USAGE if the active device is * not from this vendor. * - * Per chip drivers register their vendor handler at init time. The - * MPS extension publishes pmbus mps last, pmbus mps clear last, - * and pmbus mps clear force. + * Per chip drivers register their vendor handler at init time. */ typedef int (*pmbus_vendor_handler_t)(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); diff --git a/lib/pmbus.c b/lib/pmbus.c index 62a66593638..e38f65a7979 100644 --- a/lib/pmbus.c +++ b/lib/pmbus.c @@ -17,10 +17,7 @@ * layers do not apply; only the arithmetic carries over). * * No code in this file may reference a specific board, SoC, or - * product. Per chip quirks (MPS DIRECT format LSBs, vendor registers, - * VID coercion, ADDR_VBOOT auto promotion, and the like) belong in - * per chip drivers under drivers/power/regulator/ or in board local - * files under board/<vendor>/<board>/. + * product. */ #include <ctype.h> @@ -727,8 +724,9 @@ int pmbus_set_active(int bus_seq, u8 addr) /* * Probe MFR_ID in both byte orders. Spec compliant chips return - * "MPS" / "TI" / etc. in the natural reading (forward); MPS NVM - * personalities store the string LSB first and need the reverse + * "MPS" / "TI" / etc. in the natural reading (forward), but + * support both like MPS NVM + * personalities that store the string LSB first and need the reverse * read. Chip table entries declare which one is canonical for * the chip family they describe. */ --- base-commit: b8e0086b585791a771416ce51b58ce0097bc0b28 branch: for-upstream/power-mpq8785-auto-probe-v1 -- 2.43.0
